本研究目的是探討封裝效應對於無線通訊系統射頻晶片特性所造成之影響。本論文致力於發展一套有系統的分析方法，用以審慎評估覆晶與鎊線封裝之寄生效應，並嚴謹探討在一個無線區域網路射頻接收機晶片中，封裝效應對於前端低雜訊放大器將可能造成之影響。此外論文中也將延伸探討晶片-封裝-基板共設計之概念與方法。論文首先從物理結構開始，探討覆晶與鎊線兩種射頻封裝技術之特性差異，並分別發展對應之寬頻等校模型，以了解兩種不同封裝技術之寄生效應。論文中亦設計一系列之測試晶片，用以萃取封裝寄生效應之等校模型元件值，利用所設計之測試晶片與模型化理論，即可針對不同之封裝技術分別建立完整之等校電路模型。此外本研究也深入分析覆晶封裝結構對於晶片螺旋電感器所產生之相互影響，藉由獨立封裝之測試晶片，發展具有封裝考量之螺旋電感器修正模型。由實驗結果可驗證本論文所發展之封裝模型頻寬可達20GHz，模型化與實測之結果非常吻合。論文第二部分則利用所建立之封裝等校電路模型，定性地探討封裝效應對於無線區域網路射頻接收機前端低雜放大器所造成之影響。利用線性與非線性分析方法，可準確找出低雜訊放大器電路參數與封裝寄生元件之相依性，並配合指標因子加以評估覆晶與鎊線封裝效應對電路所產生不同性質之影響。論文中也同時發展晶片-封裝共模擬之技巧，能進一步預測封裝後低雜訊放大器之寬頻響應。論文第三部份則延伸探討封裝與基板對於第三代行動通訊系統發射機升頻器所造成之影響，並研究晶片-封裝-基板共設計之方法。電路設計上先利用非線性分析方法評估寄生效應之影響，進而利用電磁模擬軟體分析封裝與基板之寄生效應，並適當設計接地寄生電感值。經由實驗結果可發現，適當的設計接地路徑之寄生電感值，將可有效地減輕封裝與基板寄生效應對升頻器模組之影響，並減少電路特性之惡化，進而達到最佳化設計之目標。

This dissertation aims to evaluate the package effects on the performance of radio frequency integrated circuits (RFICs) for wireless applications. A model-based study is presented to compare the effects between flip-chip and wire-bond packages on a front-end cascode low-noise amplifier (LNA) in a 2.45 GHz CMOS wireless local area network (WLAN) receiver. To construct the package electrical models, specific modeling dies are designed to help extract the equivalent-circuit elements from measured S-parameters for chip-package interconnects. Furthermore, the ground-proximity effect on on-chip spiral inductors in a flip-chip package is first observed and presented in this modeling study. Excellent agreement between modeling and measurement is obtained by up to 20 GHz for a 64-pin flip-chip ball grid array (FC-BGA) package and a 64-pin wire-bond quad flat nonlead (WB-QFN) package. For practical applications, the established package models are used to predict the degradation of the figure of merit for the cascode LNA under packaged condition. Chip-package co-simulations can achieve good agreement with measurements, and thus can persuasively account for the complete effects caused by the two different packages on the cascode LNA.
To simultaneously consider the package and board interconnect effects on RFICs, this dissertation also designs and implements a 1.95 GHz upconverter for the wideband code-division multiple-access (W-CDMA) transmitter. Specific ground wire-bonding and board connection are designed to minimize the linearity degradation due to package and board interconnects. Nonlinear analysis technique is also used to evaluate the nonlinear distortion of the upconverter in the chip-package-board co-design phase. The final measurement results have successfully verified the co-design predictions and simulations for this upconverter.

1 Introduction 1
1.1 Research Motivation 1
1.2 Package Effects on RFICs 3
1.2.1 Wire-Bond Package Effects 5
1.2.2 Flip-Chip Package Effects 8
1.3 Chip-Package-Board Co-Design 10
1.4 Overview of Dissertation 13
2 Extraction of RF Package Models 15
2.1 FC-BGA versus WB-QFN 15
2.2 FC-BGA Package Model 18
2.3 WB-QFN Package Model 28
3 Flip-Chip and Wire-Bond Package Effects on a Receiver Low-Noise Amplifier 32
3.1 Low-Noise Amplifier Design 32
3.2 Analysis of RF Specification Parameters 34
3.2.1 Small-Signal Gain 35
3.2.2 Noise Figure 40
3.2.3 Third-Order Intercept Point 44
3.3 Co-Simulation and Measurement Results 48
4 Package and Board Effects on a Transmitter Upconverter 54
4.1 Upconverter Design 55
4.2 Analysis of Linearity Parameters 56
4.2.1 Conversion Gain 57
4.2.2 Third-Order Intercept Point 61
4.2.3 Adjacent Channel Power Ratio 65
4.2.4 Ground Inductance Effects 66
4.3 Co-Simulation and Measurement Results 69
5 Conclusions 77
Bibliography 79
Appendix 89
A Derivation of Nonlinear Current Sources in the Volterra Series Analysis 89
Vita 95

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