計算電子元件的特性可分為：1.晶片(Chip)部分。2.組裝(Assembly)部分，即封裝部分。3.印刷電路板(PCB)部分。封裝的電性分析須從系統的觀點來看，以利辨別其效能所帶來的影響。雖然分析的方法可能會變，其特性卻由一些相同的基本電路參數(即電阻、電感、電容)得出。不同的量測或模型化技術都可用來證實所列的資料。
當在表面黏著組合過程中，溼氣在塑膠封裝裡，會導致脫層(Delamination)及裂痕(Cracking)。在封裝製程中，PKG會被加熱至220~240℃，此時，塑膠裡的溼氣就會被汽化而在PKG裡產生應力(Stress)，以至於在膠體和導線架之間或在膠體和晶片之間的介面產生脫層。況且PKG的組成，也會因為熱膨脹係數(CTE)的不匹配(Mismatch)而產生應力，假設這些應力結合起來大於塑膠產生裂縫的力量時，則裂縫就會發生。所以一個PKG如果有裂縫產生，大概與下列因素有關：1.吸溼量；2.晶片的尺寸大小；3.PKG的設計；4.膠體的特性；5.黏著回銲(Solder Reflow)時溫度的變化情形。
廣義的覆晶技術泛指：不管使用任何材料、方法，只要把晶片的I/O黏在基板上，或者將晶片翻轉後，以面朝下的方式透過金屬導體與基板(Substrate)進行接合即稱為覆晶技術。其覆晶(FC-BGA)主要優點為：1.有效利用PCB板子的面積。2.較高的I/O數目。3.能有更小的間距(Fine Pitch)。4.有較少的連接點(Footprint)。5.在高頻時，會有較佳的執行效率。6.未來它是一個低成本的產品。

To calculate the characteristics of electronic parts is divided by 1.Chip. 2.Assembly, i.e. package. 3. PCB (Printed Circuit Board). Analizing the electrical characteristics of package needs consideration from all system can distinguish the influence of function. Although the analysis method may be change but we can get the characteristics results from the parameters of circuit element (i.e. Resistance, Inductance, Capacitance). Different measurement or modeling technology can prove that the list data is correct.
That moisture in plastic packages can cause cracking or delamination during the surface mount assembly process. During this process, the packages are heated to 220-240℃. At these temperatures, any moisture present in the plastic vaporizes and exerts stresses in the package, which can cause delamination between the mold compound and the leadframe or die. The mismatch in thermal expansion coefficients of the package’s components also induces stresses. If these combined stresses are greater than the fracture strength of the plastic, cracks will form. The susceptibility of a package to cracking depends on: 1.amount of absorbed moisture, 2.die size, 3.package design, 4.mold compound characteristics, 5.solder reflow temperature profile.
Widely, flip chip technology is defined as mounting the chip to a substrate with any kind of materials and methods, as long as the chip surface (active area) is facing to the substrate. The advantages of FC-BGA is：1.Efficient use of PCB area. 2.Area array access for high I/O device. 3.Allow for finer pitches. 4.Fewer joints. 5.Better performance of high frequency application. 6.FC is and will be lowest cost.

目錄……………………………………………………..... viii
附表目錄……………………………………………… ..... xii
附圖目錄……………………………………………… ..... xiii
第一章 導論…………………………………………….... 1
1-1 前言………………………………………….. 1
1-2 封裝趨勢…………………………………….. 2
1-3 封裝特性的簡介…………………………….. 3
1-3-1 電性概述……………………………….. 3
1-3-2 溼氣敏感性程度概述………………….. 3
1-3-3 覆晶技術概述………………………….. 3
1-4 章節及組織………………………………….. 4
第二章 封裝結構的電氣特性與分析…………..... .... 5
2-1 簡介………………………………………….. 5
2-2 電性參數的定義及分析…………………….. 5
2-2-1 傳輸延遲(Propagation Delay)………. 6
2-2-2 串音(Crosstalk)………………………. 8
2-2-3 瞬間切換雜訊...................... 9
2-2-4 反射(Reflection)……………………… 10
2-3 BGA設計對電性效能的影響…………….... 11
2-4 BGA與QFP之效能比較…………………..... 12
2-5電氣特性模型………………………………... 13
2-5-1 全波模型(Full Wave Model)…………. 13
2-5-2 離散模型(Discrete Model)…………… 14
2-5-3 集總模型(Lumped Model)……………… 14
2-5-4 直流模型(DC Model)…………………… 14
2-6 電性模擬參數值之計算…………………….. 15
2-6-1 電容矩陣計算………………………….. 15
2-6-2 電感矩陣計算………………………….. 17
2-6-3 電阻矩陣計算………………………….. 18
2-7 模擬方法…………………………………….. 19
2-7-1 軟體介紹……………………………….. 19
2-7-2 模擬步驟……………………………….. 20
2-7-3 模擬參數的設定……………………….. 21
Case 1：材料(Material)………………… 21
Case 2：腳厚度(Lead Thickness)….... 22
Case 3：間距(Pitch)……………….. .. 22
Case 4：QFP、LQFP、TQFP……………... 23
2-8 模擬結果…………………………………….. 23
2-8-1 以TSOP54(400mil) 材料為變數……... 23
2-8-2 以TSOP54(400mil) 腳厚度為變數…... 24
2-8-3 以LQFP48(10x10mm) 間距為變數….... 25
2-8-4 QFP、LQFP、TQFP電性比較…………... 26
2-9 結論………………………………………….. 26
第三章 溼氣敏感性程度對封裝的影響……….......... 28
3-1 前言………………………………………….. 28
3-2可靠度測試…………………………………... 29
3-2-1短期封裝可靠度測試…………………... 29
3-2-2長期封裝可靠度測試…………………... 30
3-3 PBGA的可靠度特性分析............. .... 33
3-3-1 PBGA的優點…………………………….. 33
3-3-2 PBGA的組成…………………………….. 33
3-3-3 組成材料及相關條件………………….. 33
3-3-4 PBGA之爆米花效應…………………….. 34
3-3-5 PBGA之溼氣吸收度…………………….. 35
3-4 PBGA應力的分佈…………………………….. 35
3-5 討論………………………………………….. 37
3-5-1 裂痕的形式…………………………….. 37
3-5-2 爆米花裂痕的解決之道……………….. 38
3-5-3 毛細現象……………………………….. 38
第四章 覆晶封裝之失效分析………………………...... 39
4-1 簡介………………………………………….. 39
4-2 覆晶技術的特性…………………………….. 41
4-2-1 高密度基板…………………………….. 41
4-2-2 覆晶植球……………………………….. 42
4-2-3 填膠製程……………………………….. 43
4-2-4 銅導線晶片…………………………….. 44
4-3 Flip Chip失效分析…………………………. 45
4-3-1 晶片與基板失去準位的現象………….. 45
4-3-2 黏著凸塊橋接………………………….. 46
4-3-3 助銲劑(Flux)殘留現象………………… 46
4-3-4 點膠後有孔洞(Void)發生……………… 46
4-4 Flip Chip BGA實例討論……………………. 47
4-4-1 實例一：凸塊偏移…………………….. 47
4-4-2 實例二：脫層與凸塊擠壓…………….. 48
4-4-3 實例三：脫層及裂痕………………….. 50
4-4-4 實例四：凸塊橋接…………………….. 50
4-5 結論………………………………………….. 52
第五章 結論與未來發展趨勢……………………........ 53
5-1 結論………………………………………….. 53
5-2 未來發展趨勢……………………………….. 54
參考文獻………………………………………………..... 56

[1] Pecht , Nguyen and Lakim “Plastic-Encapsulated-Microelectronics” in
WILEY-INTERSCIENCE.
[2] 李信忠,“電子封裝之電氣特性模型的建立與信號完整性分析”, 國立成功大學, 電機
工程學系, 民89。
[3] 謝金明，”高速數位電路設計暨雜訊防制技術”，HP惠普科技叢書， 1997。
[4] Luc Martens, “High-Frequency Characterization of Electronic Package”,
Kluwer Academic, 1998.
[5] 劉漢誠原編著,趙建基等譯,”球腳格狀陣列封裝技術,臺北縣土城市”,鴻海精密工業,
民86。
[6] Ansoft Corp., “Maxwell Quick 3D Parameter Extractor User’s Manual”,
November 1994.
[7] Keith Nabors and Jacob White, ”FastCap: A Multipole Accelerated 3-D
Capacitance Extraction Propagation” in IEEE Transactions on Computer-
Aided Design, vol. 10, pp. 1447-1459, No. 11, November 1991.
[8] D. M. Pozar, “Microwave Engineering” in Addison-Wesley, 1990.
[9] Ansoft Corp., “ParICs Physical IC Modeler User’s Reference”.
[10] R. Lin, E. Blackshear, and P. Serisky, “Moisture induced package cracking
in plastic encapsulated surface mount componenets during solder reflow
process,” in Proc. Int. Reli. Phys. Symp., 1988, pp.83-89.
[11] DAVID SUHL “Thermally Induced IC Package Cracking” in IEEE Transactions
On Components, Hybrids, and Manufacturing. Technology, vol. 13, no. 4,
Dec. 1990, pp.940-945.
[12] Jesse E. Galloway and Barry M. Miles “Moisture Absorption and Desorption
Predictions for Plastic Ball Grid Array Packages” in IEEE T Transactions
On Components, Packaging, and Manufacturing Technology -PART A, vol. 20,
no. 3, Sep. 1997, pp.274-279.
[13] T.C. Chen, L.C. Chang, P-H Tsao, Chender Haung Nd C.Z. Chen
“Investigation the Moisture Migration and Popcorn Cracking of TSOP II LOC
Package by Experimental and Numerical Methods” in Packaging Seminar of
Vanguard International Semiconductor Corporation, pp. 47-51.
[14] JEDEC, JESD22-A113-A, June 1995, “preconditioning of Plastic Surface
Mount Device Prior to Reliability Testing,” JEDEC Standard, Electronic
Industries Association, Arlington, VA, pp. 1-5.
[15] Laurene Yip, Tom Massingill, Helen Naini “Moisture Sensitivity Evaluation
of Ball Grid Array Packages” in 1996 Electronic Components and Technology
Conference, pp. 829-835.
[16] Laurene Yip “Moisture Sensitivity and Reliability of Plastic Thermally
Enhanced QFP Packages” in IEEE Transactions On Components, Packaging, and
Manufacturing Technology-PART B, vol. 18, no. 3, Aug. 1995, pp.485-490.
[17] T. M. Moore, R. McKenna. And S. Kelsall, “Correlation of surface mount
plastic package reliability testing to nondestructive inspection by
scanning acoustic microscopy,” in Proc. Int. Reli. Phys. Symp., 1991, pp.
160-166.
[18] R. Shook, “Moisture sensitivity characterization of plastic surface mount
devices using scanning acoustic microscopy,” in Proc. Int. Reli. Phys.
Symp., 1992, pp. 157-168.
[19] Seung-Ho Ahn and Young-Shin Kwon, “Popcorn Phenomena in a Ball Grid Array
Package” in IEEE Transactions On Components, Packaging, and Manufacturing
Technology –PART B, vol. 18, no. 3, Aug. 1995, pp.491-495.
[20] Michael G. Pecht, Fellow, IEEE “Moisture Sensitivity Characterization of
Build-Up Ball Grid Array Substrates” in IEEE Transactions on Advanced
Packaging, vol.22, no. 3, Aug. 1999, pp.515-523.
[21] 陳梧桐,”我國封裝測試產業與技術發展觀察”,12-10-2000。
[22] Joel Darnauer, Dave Chengson, Bell Schmidt, Ed Priest, David A. Hanson,
and William G. Petefish “Electrical Evaluation of Flip-Chip Package
Alternatives for Next Generation Microprocessors” in IEEE Transactions on
Advanced Packaging, vol. 22, no.3, Aug. 1999, pp. 407-415.
[23] 黃新鉗/瞿宗耀/吳恩柏,”由SIA Roadmap看覆晶技術的發展”。
[24] 盧思維,”複層式填充物在覆晶技術中製程之探討”, 國立交通大學電子物理系, 民
89。
[25] 莊達人編著，"VLSI製造技術"，高立圖書公司有限公司。
[26] 林世雄,”Flux and Underfill Evaluation”,工研院電子所構裝工程部。