Responsive image
博碩士論文 etd-0712107-154339 詳細資訊
Title page for etd-0712107-154339
論文名稱
Title
有機基板上的貫穿孔之電性特性分析與模型化
Electrical Characterization and Modeling of Plated Through Holes in Organic Substrate
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
83
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2007-07-02
繳交日期
Date of Submission
2007-07-12
關鍵字
Keywords
等效電路模型、貫穿孔、雙面量測
Plated Through Holes, Double-side Measurement, Equivalent Circuit Model
統計
Statistics
本論文已被瀏覽 6040 次,被下載 7266
The thesis/dissertation has been browsed 6040 times, has been downloaded 7266 times.
中文摘要
本論文針對在有機基板上的貫穿孔結構,探討其高頻特性以及不同結構尺寸對電性特性的影響。論文內容主要分為四部份,第一部分主要介紹在基板上各種連通柱的種類,包含基板鑽孔的製作流程與現有的鑽孔能力,且針對貫穿孔的結構與製程上的考量做進一步的探討。第二部分為實際的貫穿孔量測,介紹高頻雙面量測技術,以及比較傳統高頻共面探針量測與雙面量測的差異。第三部分為利用Ansoft HFSS全波模擬軟體進行高頻模擬分析,同時探討軟體中不同激發源的設定以及模型結構對模擬結果的影響。第四部份為依據其物理結構建立寬頻的等校電路模型,探討不同尺寸結構的貫穿孔在電性特性上的差異以及提出相關的設計概念。
Abstract
This thesis focuses on the structures of plated through holes in organic substrate, and discusses the high-frequency electrical characteristics of various plated through hole structures. This thesis consists of four parts. The first part introduces various kinds of vias in multilayer substrate. This content includes substrate drilling processes and capabilities, and discussions on plated through hole structures and their manufacture concerns. The second part focuses on actual measurement of plated through holes, and introduces high-frequency double-side probing technique. The difference from traditional high-frequency coplanar probing measurement is also discussed. The third part focuses on the high-frequency simulation by full-wave software – Ansoft HFSS, and discusses the effects of various excited source and model structures on simulations. Part4 focuses on developing the broadband equivalent circuit model based on the physical structures, and discusses the electrical characterization of different plated through holes, and provides the related design concept.
目次 Table of Contents
第一章 緒論 1
1.1 研究動機 1
1.2 先前技術簡介 2
1.3 章節介紹 4
第二章 基板之連通柱製程與結構 5
2.1 基板結構與連通柱種類 5
2.2 連通柱結構與製程考量 7
2.3 有機基板貫穿孔尺寸探討 12
第三章 有機基板貫穿孔之量測 15
3.1 雙面量測技術 15
3.2 單埠量測結果 18
3.3 雙埠量測結果 28
第四章 有機基板貫穿孔之全波模擬分析 31
4.1 HFSS電磁模擬技術 31
4.2 Lump port激發之結果 31
4.3 Wave port激發之結果 41
4.4 基板尺寸之影響 45
4.5 討論與建議 50
第五章 模型化分析與特性探討 52
5.1 寬頻模型萃取技術 52
5.2 寬頻模型化結果 54
5.3 不同尺寸之貫穿孔特性 60
第六章 結論 65
參考文獻 66
附錄一 自然諧振頻率點列表(50MHz ~ 40GHz)i
附錄二 自然諧振頻率點列表(40GHz ~ 50GHz)ii
附錄三 模擬設定與模擬時間列表 iii
參考文獻 References
[1] D. Brooks, Signal Integrity Issues and Printed Circuit Board Design, Prentice Hall PTR, 2003.
[2] S. H. Hall, G. W. Hall, and J. A. McCall, High-Speed Digital System Design, John Wiley & Sons, INC., 2000.
[3] D. K. Cheng, Field and Wave Electromagnetics, Addison Wesley, 1989.
[4] M. E. Goldfarb and R. A. Pucel, “Modeling via hole grounds in microstrip,” IEEE Microwave and Guided Wave Letters, vol. 1, pp. 135-137, June 1991.
[5] J. Zhao and J. Fang, “Significance of electromagnetic coupling through vias in electronics packaging,” in Pro. IEEE Electrical Performance of Electronic Packaging, Oct. 1997, pp. 135-138.
[6] E. Laermans, J. D. Geest, D. D. Zutter, F. Olyslager, S. Sercu and D. Morlion, “Modelling differential via holes,” in Pro. IEEE Electrical Performance of Electronic Packaging, Oct. 2000, pp. 127-130.
[7] E. Laermans, J. D. Geest, D. D. Zutter, F. Olyslager, S. Sercu and D. Morlion, “Modelling differential via holes,” IEEE Transactions on Advanced Packaging, vol. 24, pp. 357-363, Aug. 2001.
[8] C. C. Huang, L. Tsang, D. Miller and A. Tripathi, “Modeling of multi-vias coupling for high speed interconnects,” in Pro. IEEE Electrical Performance of Electronic Packaging, Oct. 2001, pp. 161-164.
[9] J. Fan, J. L. Drewniak and J. L. Knighten, “Lumped-circuit model extraction for vias in multilayer substrates,” IEEE Transactions on Electromagnetic Compatibility, vol. 45, pp. 272-280, May 2003.
[10] Q. Gu, Y. E. Yang and M. A. Tassoudji, “Modeling and analysis of vias in multilayered integrated circuits,” IEEE Transactions on Microwave Theory and Techniques, vol. 41, pp. 206-214, Feb. 1993.
[11] Q. Gu, M. A. Tassoudji, S. Y. Poh, R. T. Shin and J. A. Kong, “Coupled noise analysis for adjacent vias in multilayered digital circuits,” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Application, vol. 41, pp. 796-804, Dec. 1994.
[12] C. Y. Tham, A. McCowen and M. S. Towers,“Efficient modeling of PCB transients via a full-wave 3-D frequency domain integral equation,” IEEE Transactions on Magnetics, vol. 371, pp. 3676-3679, Sept. 2001.
[13] M. R. Abdul-Gaffoor, H. K. Smith, A. A. Kishk and A. W. Glisson, “Simple and efficient full-wave modeling of electromagnetic coupling in realistic RF multilayer PCB layouts,” IEEE Transactions on Microwave Theory and Techniques, vol. 50, pp. 1445-1457, June 2002.
[14] L. Tsang and D. Miller, “Coupling of vias in electronic packaging and printed circuit board structures with finite ground plane,” IEEE Transactions on Advanced Packaging, vol. 26, pp. 375-384, Nov. 2003.
[15] G. Antonini, A. C. Scogna and A. Orlandi, “Equivalent network synthesis for via holes discontinuities,” IEEE Transactions on Advanced Packaging, vol. 25, pp. 528-536, Nov. 2002.
[16] G. Antonini, A. C. Scogna and A. Orlandi, “S-parameters characterization of through, blind, and buried via holes,” IEEE Transactions on Mobile Computing, vol. 2, pp. 174-184, April-June 2003.
[17] W. D. Becker, P. Harms and R. Mittra, “Time domain electromagnetic analysis of a via in a multilayer computer chip package,” in IEEE MTT-S International Microwave Symposium Digest, June 1992, vol. 3, pp. 1229-1232,.
[18] X. Ye, D. M. Hockanson, M. Li, Y. Ren, W. Cui, J. L. Drewniak and R. E. DuBroff, “EMI mitigation with multilayer power-bus stacks and via stitching of reference planes,” IEEE Transactions on Electromagnetic Compatibility, vol. 43, pp. 538-548, Nov. 2001.
[19] C. Wang, J. Fan, J. L. Knighten, N. W. Smith, R. Alexander and J. L. Drewniak, “The effects of via transitions on differential signals,” in Pro. IEEE Electrical Performance of Electronic Packaging, Oct. 2001, pp. 39-42.
[20] R. Abhari, G. V. Eleftheriades and E. V. Deventer-Perkins, “Analysis of differential vias in a multilayer parallel plate environment using a physics-based CAD model,” in IEEE MTT-S International Microwave Symposium Digest, May 2001, vol. 3, pp. 2031-2034.
[21] D. H. Kwon, J. Kim, K. H. Kim, S. C. Choi, J. H. Lim, J. H. Park, L. Choi, S. W. Hwang and S. H. Lee, “Characterization and modeling of a new via structure in multilayered printed circuit boards,” IEEE Transactions on Components and Packaging Technologies, vol. 26, pp. 483-489, June 2003.
[22] J. H. Kim, S. W. Han and O. K. Kwon, “Analysis of via in multilayer printed circuit boards for high-speed digital systems,” in Pro. IEEE Electronic Materials and Packaging, Nov. 2001, pp. 382-387.
[23] J. H. Kim and M. Swaminathan, “Modeling of multilayered power distribution planes using transmission matrix method,” IEEE Transactions on Advanced Packaging, vol. 25, pp. 189-199, May 2002.
[24] J. S. Pak and J. Kim, “3GHz through-hole signal via model considering power/ground plane resonance coupling and via neck effect,” in Pro. 53th, Electronic Components and Technology Conference, May 2003, pp. 1017-1022.
[25] T. L. Wu, C. C. Wang, C. C. Kuo and J. S. Hsieh, “A novel time-domain method for synthesizing broadband Macro-π models of differential via,” IEEE Microwave and Wireless Components Letters, vol. 15, pp. 378-380, May 2005.
[26] C. C. Wang, C. W. Kuo, C. C. Kuo and T. L. Wu, “A Time-Domain Approach for Extracting Broadband Macro-π Models of Differential Via Holes,” IEEE Transactions on Advanced Packaging, vol. 25, pp. 789-797, Nov. 2006.
[27] E. Laermans, J. D. Geest, D. D. Zutter, F. Olyslager, S. Sercu, M. Morlion, “Modeling complex via hole structures,” IEEE Transactions on Advanced Packaging, vol. 25, pp. 206-214, May 2002.
[28] H. W. Johnson and M. Graham, High-speed Digital Design, Prentice Hall PTR, 1993.
[29] Cascade Application note, “On-Wafer Vector Network Analyzer Calibration and Measurements,” Cascade.
[30] Ansoft HFSS Engineering Note, Ansoft Corporation.
[31] 楊立群, “低溫共燒陶瓷嵌入式電感與電容元件之設計與模型化,” 國立中山大學電機工程學系碩士論文, 民國九十一年
[32] D. M. Pozar, Microwave Engineering, John Wiley & Sons, INC., 1998.
電子全文 Fulltext
本電子全文僅授權使用者為學術研究之目的,進行個人非營利性質之檢索、閱讀、列印。請遵守中華民國著作權法之相關規定,切勿任意重製、散佈、改作、轉貼、播送,以免觸法。
論文使用權限 Thesis access permission:校內外都一年後公開 withheld
開放時間 Available:
校內 Campus: 已公開 available
校外 Off-campus: 已公開 available


紙本論文 Printed copies
紙本論文的公開資訊在102學年度以後相對較為完整。如果需要查詢101學年度以前的紙本論文公開資訊,請聯繫圖資處紙本論文服務櫃台。如有不便之處敬請見諒。
開放時間 available 已公開 available

QR Code