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博碩士論文 etd-0903107-162940 詳細資訊
Title page for etd-0903107-162940
論文名稱
Title
利用混合正交極座標調制器技術提升需要功率控制之第三代行動通訊發射機平均效率
A Hybrid Quadrature Polar Modulator for Enhancing Average-Efficiency of 3G Mobile Transmitter with Power Control
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
78
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2007-07-16
繳交日期
Date of Submission
2007-09-03
關鍵字
Keywords
數位預失真、E類功率放大器、混合正交極座標調制器
Class-E Power Amplifier, Digital Predistortion, Hybrid Quadrature Polar Modulator
統計
Statistics
本論文已被瀏覽 5825 次,被下載 2796
The thesis/dissertation has been browsed 5825 times, has been downloaded 2796 times.
中文摘要
本論文在利用混合正交極座標調制器技術提升需要功率控制之第三代行動通訊發射機平均效率,此發射機架構有別於傳統極座標調制發射機,射頻功率放大器之輸入端改為一正交調制訊號,波包訊號則藉由S類調制器還原後載予功率放大器之供應電壓端,且輸入訊號之瞬時振幅正比於波包振幅,可改善傳統極座標調制架構具有射頻訊號饋入穿透與增益壓縮之缺點。使用E類功率放大器可有效提升發射機之平均效率表現。利用FPGA電路板實現之基頻數位處理器可產生CDMA2000 1x系統之基頻I、Q訊號與數位波包之差異積分調制訊號。另外,針對E類功率放大器之Vdd/AM與Vdd/PM非線性現象設計一數位預失真器進行補償,以期使本發射機於不同之平均調制輸出功率下,皆能兼具高效率與高線性度之表現。
Abstract
This thesis aims to use a hybrid quadrature polar modulator (HQPM) for enhancing average efficiency of 3G mobile transmitter with power control. The HQPM consists of a quadrature modulator instead of a phase modulator in the polar modulator for processing the RF modulated carrier and a Class-S modulator for processing the envelope signal. In addition, the instantaneous magnitude of the quadrature modulated signal is propotional to the instantaneous envelope magnitude. As a result, the output feed-through and gain-compression phenomenon in the polar modulator can be improved. The digital baseband processor realized by FPGA can generate CDMA2000 1x baseband signal with excellent modulation accuracy. For enhancing the average transmit efficiency, the output PA is realized as Class-E design. But the Vdd/AM and Vdd/PM nonlinear effects of the Class-E PA distort the output signal. To solve this problem, a digital predistorter is presented to compensate the nonlinear distortions. The proposed HQPM-based transmitter can simultaneously achieve high efficiency and high linearity over a wide modulated output power range.
目次 Table of Contents
目錄 I
圖表目錄 III
第一章 緒論 1
1.1 簡介 1
1.2 章節規劃 6
第二章 混合正交極座標調制發射機 7
2.1 系統架構 7
2.2 S類調制器 9
2.2.1 架構簡介 9
2.2.2 設計流程 10
2.2.3 模擬結果 11
2.2.4 量測結果 16
2.3 E類功率放大器 21
2.3.1 架構簡介 21
2.3.2 設計流程 23
2.3.3 模擬與量測結果 25
第三章 基頻數位電路設計 33
3.1 架構簡介 33
3.2 基頻數位電路單元設計 34
3.2.1 IS-95 FIR數位濾波器 34
3.2.2 半頻帶濾波器 35
3.2.3 直角座標與極座標轉換單元 36
3.2.4 線性內插器 39
3.2.5 一階差異積分調制器 40
3.2.6 數位預失真器 41
3.2.7 數位類比轉換器模組 44
3.3 基頻訊號量測 45
3.3.1 預失真器功能關閉時基頻I、Q訊號之量測結果 45
3.3.2 預失真器功能開啟時基頻I、Q訊號之量測結果 46
第四章 系統設計議題之探討 48
4.1 S類調制器輸出訊號品質分析 48
4.2 射頻路徑和波包路徑間之時間校準 50
4.3 發射機之調制平均效率 51
4.4 E類功率放大器輸入電壓對供應電壓之比例選擇 52
第五章 混合正交極座標調制發射機整合量測結果 56
5.1 量測設置說明 56
5.2 針對E類功率放大器非線性現象行預失真補償之整合量測結果 57
第六章 結論 62
參考文獻 63
參考文獻 References
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