現今改善快取記憶體的方法非常的多樣化和進步。我們主要著重在快取記憶體和轉譯後備緩衝器上的利用率。為了減少內文轉換在系統上的花費，我們利用了在ARMS3C2410 中一個用來將位置空間作轉換的硬體去實現了快速位址空間切換的機制。快速位址空間切換能夠提升快取記憶體和轉譯後備緩衝器上的利用率能夠得到提升進而改善整體效能。
快速位址空間切換是一種可以改善快取記憶體效能的方法。它最主要的關鍵在程序運行內文轉換動作時不需要執行快取記憶體和轉譯後備緩衝器的清除資料動作。
為了去實作快速位址空間切換，我們將不同的程序根據程序ID分別定址在不同的位置。當發生內文轉換時，我們可以只需要改變程序執行的位置而不需進行快取記憶體和轉譯後備緩衝器的清除。
本篇論文主要是著重於快取記憶體和轉譯後備緩衝器上的效能改善的測量和評估，我們使用一個具有高可靠性且以訊息傳遞為行程間溝通的微核心架構叫做MinixARM。藉由這個微核心我們可以更簡單了解和分析系統效能以及機制
中額外的花費。我們提供了更完善的效能測試，藉由benchmark測試出Fast Context Switching最多可提昇整體效能65%。

The methods of improving the cache performance are multiform and advanced of
nowadays. We are concerned about the cache and TLB utility. To reduce the context switch
cost on system, we utilize an address-space switching hardware of ARMS3C2410 processor
to realize the fast address switching mechanism. The Fast Context Switch can help to improve
cache and TLB utility and performance.
Fast Context Switch is a method that can help to improve the cache performance. The
key feature of Fast Context Switch is without any cache and TLB flush on process context
switching. To implement Fast Context Switch, we address the different processes to different
address space by process ID. When context switch occurs, we can just change the working
space without the cache and TLB flush.
This thesis emphasizes on the performance measure for improvement on the cache
and TLB. We use a high dependable microkernel architecture for message passing between
processes, this microkernel called MinixARM. Rely on the microkernel, we can more easily
understand and analyze the system performance and additional cost of the cache scheme. We
provide more complete performance tests by benchmarks, fast context switch can increase the
system performance about 65% at most.

Contents
List of Figures iii
List of Listings iv
List of Tables v
Chapter 1 Introduction 1
1.1 MinixARM Embedded System.... . 1
1.2 Motivations.....3
1.3 Organization of the Thesis.... . . . 3
Chapter 2 MinixARM Architecture 5
2.1 MinixARM Architecture.... . . . . 6
2.1.1 Boot Procedure of MinixARM... . . . 7
2.1.2 Process Communication.... 8
2.2 Memory Management..... 9
2.2.1 Memory Management Unit...9
2.2.2 MinixARM Memory Layout... . . . . 11
2.2.3 Mapping Physical to Virtual Space... . 12
Chapter 3 Fast Address Space Switching for MinixARM 14
3.1 Fast Context Switch..... . 14
3.2 Implementation of Fast Context Switch... . . 16
3.2.1 Initialize the Process Address Space... 16
3.2.2 Initialize the Translation Table Base(TTB).. . . . 17
3.2.3 Modify Kernel for Fast Context Switch.. . . . . 18
3.2.4 Remap RAM and I/O Regions... . . . 19
3.2.5 Modify System Calls for MinixARM..23
Chapter 4 MMU Fault Protection And Process Management For MinixARM 26
4.1 MMU Error Checking..... 27
4.1.1 The Sequence of MMU Error Checking.. . . . . 29
4.2 Access Permission and Domain.... . 30
4.3 Process Management..... 31
4.3.1 The Problem of Process Management..31
4.3.2 Domain Preemption.... . . 32
4.3.3 Domain Preemption Algorithm... . . 33
4.4 The Domain Preemption Scheme Implementation on MinixARM. . 35
Chapter 5 Performance Evaluation 39
5.1 Benchmark.....39
5.2 Compare about Domain Preemption Algorithm.. . . . . 40
5.3 Experimental Result of Fast Context Switch Scheme.. . 42
5.4 Analysis about System Calls.... . . 42
5.5 Summary...... 52
Chapter 6 Conclusion and Future Works 53
6.1 Conclusion.....53
6.2 Future Works..... . . . . 53
Appendices...... . . 54
Appendix A The Benchmarks 55

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