在過去幾年來在許多的研究中探討不同晶片模式的破壞以及改善方式。晶片破裂在覆晶構裝體的可靠度上為一重要的課題，在覆晶構裝體製程上造成晶片破裂(die crack)的原因包含了許多不同的因素，如材料本身的缺陷所造成的crack，也有可能是因為遭受大應力而造成的crack，亦或是由於製程不良及各材料間由於熱膨脹係數的不同造成的crack。

本研究為針對覆晶球閘陣列構裝體(flip-chip ball grid array， FCBGA)，以有限元素分析軟體ANSYS利用數值模擬的方式來模擬覆晶構裝體在測試過程中受到熱負載與熱/機械負載下，晶片表面應力與晶片/填充底膠之間剪應力的分佈，並且利用全因子實驗方式來探討測試製具在不同的接觸方式下對於晶片應力值變化，以期提高產品的可靠度。

Over the past years, there are many studies discusses different modes of die cracking and improvement. Die cracking is one of the crucial issues that influence the reliability of flip chip assemblies. Die cracking depends on a combination of several factors, such as residual bending stresses generated in the package due to mismatches in the coefficients of thermal expansion(CTE) of the various materials in the assembly or wafer dicing process .

In this study, the stresses in the chip of a FCBGA (Flip-Chip Ball Grid Array) induced by the temperature raising and by the mechanical load of different pressures on an automatic test handler are investigated by using commercial finite element software ANSYS, while the FCBGA is subjected to the high temperature electrically test. The causes and precautions corresponding to the die cracking are studied in order to improve the reliability of products.

目 錄 I
表 說 明 III
圖 說 明 IV
中 文 摘 要 VII
ABSTRACT VIII
第一章 緒論 1
1-1 前言 1
1-2測試製程簡介 2
1-2-1探針與測試座簡介 2
1-2-2測試機與測試製具簡介 2
1-3 研究目的與動機 3
1-4 文獻回顧 3
1-5 組織與章節 5
第二章 數值分析理論 14
2-1 線性材料性質 14
2-2 彈性理論分析 14
2-3 降服準則 17
第三章 研究方法與步驟 22
3-1 簡介 22
3-2 分析模型的建立與基本假設 22
3-3 有限元素模型之建構 23
3-4 材料性質與邊界條件 23
3-5 ANSYS分析流程 24
第四章 熱/機械負載之影響 41
4-1未加固定環之覆晶構裝體受熱負載現象探討 41
4-2未加固定環之覆晶構裝體受機械負載現象探討 42
4-3 添加不同填充底膠的影響 43
4-4 添加固定環的影響 43
第五章 測試製具參數探討 72
5-1 測試製具參數設定 72
5-2 參數因子結果探討 73
第六章 結論與未來展望 87
6-1 結論 87
6-2 未來展望 87
參考文獻 89

1. Raman M. and Gopalakrishnan L. and Srihari K. and Woychik C., Die Cracking in Flip Chip Assemblies, Department of Systems Science and Industrial Engineering, pp.13902-6000, 2000
2. Ahn E. C. and Cho T. J. and Shim J. and Moon H. and Lyu J. and Choi K. and Kang S. and Oh S., Reliability of Flip Chip BGA Package on Organic Substrate, Electronic Components and Technology Conference, pp.1215-1220, 2002
3. Ranjan M. and Srihari K. and Woychik C., Die Cracking in Flip Chip Assemblies, Electronic Components and Technology Conference, pp.729-733, 1998
4. Milton Ohring, Reliability and Failure of Electronic Materials and Devices, Academic Press, pp.415-435, 1998
5. Yamaguchi K. and Mizutani K. and Tanaka Y., Chipping of the Works at Corner in Grinding of Ceramics, ICPE , pp.552-557, 1997
6. 施應慶、陳友寧、陳守龍、吳恩柏、蔡振榮、邵清安，研磨製程對晶片強度的影響，中國機械工程學會第18屆全國學術研討會論文集新興工程技術，第367-374頁，2001
7. George Hawkins and Howard Berg and Mali Mahalinggam and Gary Lewis and Lynn Lofgran, Measurement of Silicon Strength as Affected by Wafer Back Processing, Physical Electronics & Packaging Laboratory, SRDL, Report No, PEPL-37-8,1998
8. Cordner T. and Marks B., GaAs Wafer Breakage, Causes and Cures, Growth and Process, IEEE GaAs IC Symposium, pp.317-320, 1993
9. Scott F. and Popelar B., An Investigation Into the Fracture of Silicon Die Used in Flip Chip Applications, 1998 International Symposium on Advanced Packaging Materials, 1998
10. Allan Ward III, Residual Stress Effects on Power Slump and Wafer Breakage in GaAs MESFET, Doctor of Philosophy in Materials Engineering Science, Virginia Polytechnic Institute and State University
11. Ronald P. and Dave W. Paananen and Tom H. and Julie M. and Krause and Richard and Ray L., Mechanical Stress Reliability Factors for Packaging GaAs MMIC and LSIC Components, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, CHMT-12, No.4, pp. 612-617, 1987
12.陳守龍，晶片強度暨覆晶構裝結構模擬與分析，國立台灣大學應力工程研究所，碩士論文，2001
13. Willems N. and Easley J. T. and Rolfe S. T., Strength of Materials, New York, McGraw Hill, pp.310–319, 1981
14. Zhao J. H., A Probabilistic Mechanics Approach to Die Cracking Prediction in Flip-Chip Ball Grid Array Package, IEEE Transactions On Components and Packing Technologies, VOL.28, NO.3, 2005
15. Fang Yu and Wenbin Sang and Enwen Pang and Donghua Liu, and Jianyong Teng , Stress Analysis in Silicon Die Under Different Types of Mechanical Loading by Finite Element Method, IEEE Transactions On Advanced Packing, VOL.25, NO.4, 2002
16. Wang J. J. and Zou D. Q. and Lu M. F. and Ren W. and Liu S., Evaluation of Interfacial Fracture Toughness of a Flip Chip Package and a Bimaterial System by a Combined Experimental and Numerical Method, Engineering Fracture Mechanics, 787-797, 1999
17. Bhuvaneshwaran and Yifan Guo, Failure Rate Prediction and Prevention of Die Cracking In Over Molded Plastic Packages
18. John H. and Ricky S. and Chris C., Effect of Underfill Material Properties on the Reliability of Solder Bumped Flip Chip on Board with Imperfect Underfill Encapsulants , IEEE ,Transactions on Components and Packaging Technologies, vol.23, No.2, p.p.323-333, 2000
19. Vroonhoven V. and J. C. W., Effects of Adhesion and Delamination on Stress Singularities in Plastic-Packaged Integrates Circurts, Journal of Electronic Packaging, Vol.115, pp.28-32, 1993
20.李英舜、葉孟考，塑封球柵電子構裝之破裂延伸，國立清華大學動力機械工程研究所，碩士論文，2000
21.郭昱綸，覆晶球柵陣列電子封裝體在溫度循環下的熱應力與熱應變分析，國立中山大學機械與機電工程學系，碩士論文，2003
22.張勳承，田口方法應用於覆晶構裝錫球的熱應力分析，國立成功大學機械工程學系，碩士論文，2003