目前數位用戶迴路濾波器或分離器大多都是針對ADSL所用的頻段上限1104 KHz或ADSL2+所用的頻段上限2208 KHz做設計，隨著網路快速的發展，數位用戶迴路的傳輸速率也不斷提高，已由最早的ADSL頻段上限 1104 KHz提高到VDSL2頻段上限30 MHz。然而，原先的設計也會因為操作頻段提高而產生一些問題，故為了提升分離器的適用頻段，須加以改良以達到規格的需求。本論文主要目的在研究如何改善因適用頻段提高而產生的特性不良問題，包括縱向平衡度及衰減量等問題，並採取共模抑流線圈和補償電路的方式，使其符合規格要求，最後提出實際電路測試數據加以佐證。

The currently used DSL splitters or filters are designed for ADSL band up to 1104 KHz and ADSL2+ band up to 2208 KHz. To meet faster internet access, DSL technology has evolved from ADSL into VDSL2 with an operating band up to 30 MHz. However, the splitters in VDSL2 band have some design difficulties in longitudinal conversion loss and isolation. The main purpose of this thesis is to find some solutions to overcome these design difficulties for splitters operating in VDSL2 band. The proposed solutions include the use of common-mode choke and compensation circuit. The final testing results of the splitters can validate the proposed solutions.

第一章 緒論
第二章 應用於寬頻網路之鐵芯分離器
2.1濾波器基本分類
2.1.1 POTS分離器
2.1.2 ISDN分離器
2.1.3 Combo分離器
2.2寬頻網路
2.3 數位用戶迴路(xDSL)
2.4 ADSL2+與VDSL2規格特性介紹
3.1 POTS鐵芯分離器基本特性介紹
3.1.1 介入損失
3.1.2 介入損失失真
3.1.3 反射損失
3.1.4 衰減量
3.1.5 群延遲失真
3.1.6 縱向平衡度
3.1.7 計數脈波
3.2 電路架構與產生的問題
3.2.1 電路架構
3.2.2 LCL產生的問題與改善方法
3.2.3 衰減量產生的問題與改善方法.
3.3 綜合討論.
第四章 結論
參考文獻

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