Responsive image
博碩士論文 etd-0125110-161129 詳細資訊
Title page for etd-0125110-161129
論文名稱
Title
利用Series-peaking技術之超寬頻低雜訊放大器設計
Design of an UWB CMOS Low Noise Amplifier with Series-peaking
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
76
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2009-12-10
繳交日期
Date of Submission
2010-01-25
關鍵字
Keywords
回授電阻、Series-peaking、輸入匹配、低雜訊放大器、CMOS、超寬頻
Input Matching, Series-peaking, Low Noise Amplifier, Resistive-feedback, Ultra-wideband, CMOS
統計
Statistics
本論文已被瀏覽 5701 次,被下載 0
The thesis/dissertation has been browsed 5701 times, has been downloaded 0 times.
中文摘要
本篇論文主旨在利用標準 0.18um CMOS 製程設計應用於超寬頻系統前端接收器之低雜訊放大器。此低雜訊放大器是以兩級放大為主架構,第一級為電感退化性架構加上R-feedback,是為了輸入端阻抗匹配,第二級為傳統的CS架構,可以增加順向增益(S21),輸出端匹配是使用LC-section。為了改善高頻增益,在第一級與第二級中間利用series-peaking的方法去實現。我們所設計的低雜訊放大器,供應電壓VDD為1.8伏特,整個電路消耗功率約為24.3mW,及整個電路大小約為1.283*1.008 mm2。本研究的低雜訊放大器所模擬的規格,S11為 -8dB以下,S22為 -10dB以下,順向增益(S21)在3.1-10.6GHz時為12.6dB~15.3dB,逆向隔離(S12)為 -30dB以下,而雜訊指數為3.24dB~4.84dB。
Abstract
The objective of this thesis is aimed at the design of low noise amplifier (LNA) for an ultra-wideband (UWB) receiver system using standard 0.18um CMOS process. A two amplified stage topology is proposed in the low noise amplifier. The first stage introduces inductively source degeneration and resistive-feedback, it can achieve wideband input impedance matching. The second stage introduces traditional CS configuration, it can improve the forward gain (S21). The second stage also used L-C section for output match. In order to improve the gain at high frequency, we introduces the series peaking between the first stage and second stage. The total power dissipation of the low noise amplifier is about 24.3mW at power supply 1.5 volt and the chip size is 1.283*1.008mm2. The simulated result shows that S11 is under -8dB, S22 is under -10dB, the forward gain S21 is 12.6dB~15.3dB at 3.1-10.6GHz, the reverse isolation S12 is under -30dB, and the noise figure is 3.24dB~4.84dB.
目次 Table of Contents
Contents
摘要.......................................................................................I
Abstract...............................................................................II
Contents............................................................................III
List of Figure.....................................................................VI
List of Table.......................................................................X
Chapter 1 Introduction....................................................1
1.1 Ultra-Wideband Communication System.............1
1.2 Motivation.....................................................................2
1.3 Thesis Organization...................................................4
Chapter 2 Concept of RF IC Design.............................5
2.1 Noise.............................................................................5
2.1.1 Noise Figure.............................................................5
2.1.2 Noise type.................................................................8
2.2 linearity........................................................................13
2.2.1 Harmonics..............................................................13
2.2.2 Gain Compression...............................................14
2.2.3 Intermodulation.....................................................15
2.2.4 Third intercept point (IP3)....................................17
2.2.5 Cascaded Nonlinear Stages..............................18
Chapter 3 Low Noise Amplifier Design.....................20
3.1 Introduction................................................................20
3.2 Consideration in Low Noise Amplifier.................21
3.2.1 Impedance Matching............................................21
3.2.2 Stability....................................................................25
3.3 Low Noise Amplifier Topology...............................27
3.3.1 Basic Topologies of Low Noise Amplifier........27
3.3.2 Inductively source degeneration LNA Noise
Analysis...................................................................31
3.4 Shunt-Peaked Architecture......................................36
3.5 Recent Wide-Band LNA Design.............................39
Chapter 4 The proposed UWB CMOS LNA with
series-peaking technique...........................44
4.1 Circuit topology...........................................................44
4.1.1 Input match..............................................................46
4.1.2 Series peaking........................................................49
4.1.3 Gain Analysis...........................................................52
Chapter 5 Simulation Results and Discussion.........54
Chapter 6 Conclusion.....................................................62
Reference...........................................................................63
參考文獻 References
[1] K. Mandke, and H. Nam, and L. Yerramneni, and C.
Zuniga, “The Evolution of Ultra Wide band Radio for
Wireless Personal Area Networks,” Summit
Technical Media,LCC,High Frequency Electronics,
Sep. 2003.
[2] IEEE 802.15 WPAN High Tate Alternative PHY Task
Group 3a(TG3a)[Online].
http://www.ieee802.org/15/pub/TG3a.html
[3] T. H. Lee, “The Design of CMOS Radio-Frequency
Integrated Circuits,” 2nd ed. Cambridge University
Press, 1998.
[4] B. Razavi, “RF Microelectronics,” 1st ed. NJ, USA:
Prentice-Hall PTR, 1998
[5] B. Razavi, “Design of Analog CMOS Integrated
Circuits,” International ed. NY:McGraw Hill Co. 2001.
[6] Abdul Mujeeb, Sigit Yuwono, Jeong Seon Lee and
Sang-Gun Lee, “Highly Linear CMOS Low Noise
Amplifier with IIP3 Boosting Technique,” IEEE SoC
Design Conference, Vol. 1, pp. I-414 - I-416, Nov.
2008.
[7] D. M. Pozar, “Microwave and RF Design of Wireless
Systems,” Wiley, New York, 2001.
[8] G. Gonzalez, “Microwave Transistor Amplifier
Analysis and Design,” 2nd ed. NJ:Prentice-Hall,
Inc. 1997.
[9] Y. Lu, K. S. Yeo, A. Cabuk, J. Ma, M. A. Do, and Z.
Lu, “A Novel CMOS Low-Noise Amplifier Design for
3.1- to 10.6-GHz Ultra-Wide-Band Wireless
Receivers,” IEEE Transactions on Circuits and
Systems-I: regular papers, vol. 53 No. 8, pp. 1683-
1692, Aug. 2006.
[10] B. Razavi, et al, “Impace of Distributed Gate
Resistance on the Performance of CMOS Device,”
IEEE Trans. Circuits and Systems-I., Vol. 41, pp.
750-754, Nov. 1994.
[11] D. K. Shaeffer and T. H. Lee, “A 1.5V, 1.5GHz
CMOS Low Noise Amplifier,” IEEE J. of Solid-
State Circuit, vol. 32, pp. 745-759, May 1997.
[12] C-W. Kim, M-S. Kang, P-T. Anh, H-T. Kim and S-G.
Lee, “An Ultra-Wideband CMOS Low Noise
Amplifier for 3-5-GHz UWB System,” IEEE J. Solid- State Circuits, Vol. 40, No. 2, pp. 544-547, Feb,
2005.
[13] S. Vishwakarma, S. Jung and Y. Joo, “Ultra
Wideband CMOS Low Noise Amplifier with Active
Input Matching,” in IEEE Workshop on Ultra
Wideband Systems, pp. 415-419, May 2004.
[14] Heechan Doh; Youngkyun Jeong; Sungyong
Jung; Youngjoong Joo; “Design of CMOS UWB
low noise amplifier with cascade feedback,” IEEE
MWSCAC, pp. 641-644 vol.2,July 2004.
[15] S. Shekhar, J. S. Walling, and D. J.
Allstot, “Bandwidth Extension Techniques for
CMOS Amplifiers,” IEEE J. Solid-State Circuits,
Vol. 41, pp. 2424-2439, Nov. 2006.
[16] Shu-Hui Yen, Chang-Zhi Chen, and Yo-Sheng
Lin, “A High-performance 1-7 GHz UWB LNA
Using Standard 0.18um CMOS Technology,”
IEEE Microwave and Optical Technology Letters,
Vol. 49, No. 10, pp 2458-2462, Oct. 2007.
[17] A. Bevilacqua and A. M. Niknejad, “An ultra-
wideband CMOS LNA for 3.1 to 10.6 GHz wireless
receiver,” IEEE JSSC, pp. 2259-2268, Dec. 2004.
電子全文 Fulltext
本電子全文僅授權使用者為學術研究之目的,進行個人非營利性質之檢索、閱讀、列印。請遵守中華民國著作權法之相關規定,切勿任意重製、散佈、改作、轉貼、播送,以免觸法。
論文使用權限 Thesis access permission:校內校外均不公開 not available
開放時間 Available:
校內 Campus:永不公開 not available
校外 Off-campus:永不公開 not available

您的 IP(校外) 位址是 3.137.192.3
論文開放下載的時間是 校外不公開

Your IP address is 3.137.192.3
This thesis will be available to you on Indicate off-campus access is not available.

紙本論文 Printed copies
紙本論文的公開資訊在102學年度以後相對較為完整。如果需要查詢101學年度以前的紙本論文公開資訊,請聯繫圖資處紙本論文服務櫃台。如有不便之處敬請見諒。
開放時間 available 已公開 available

QR Code