積層陶瓷電容器之製造程序,首先將陶瓷粉體加入適量之溶劑及分散劑,在球磨機中經歷數小時之攪拌均勻後,再加入適當之黏合劑、塑化劑繼續混合至所需黏度之陶瓷漿料;控制適當流量的陶瓷漿料經狹溝或刮刀式之供漿機構,依所需厚度將陶瓷漿料均勻塗部於製帶機上之承載薄帶上,經烘乾捲收拉製成乾燥之陶瓷薄帶。
接著,在乾燥陶瓷薄帶上用網版印刷方式依所設計之圖案印上導電電極膏形成積層陶瓷電容之內電極結構,再依原設計之層數,錯位堆疊壓合出疊層片體,經由精密之切割得到原設計兩端電容值及數量之陶瓷元件體,經過黏合劑排除之熱處理,再經高溫燒結過程後,使用沾銀方式將具有相對極性之兩端,用導電膏覆蓋成端電極,使各個陶瓷元件具備實質電容特性之電容器。
在實際PC板表面黏著元件焊接應用上,為避免含銀的端電極很快的熔於銲錫中,造成元件內電極與外界断路,所以必須先在端電極鍍上一層導電之蔽障鎳層,雖然鎳亦為可焊性,但容易氧化造成焊性不良,所以必須再加鍍一層錫層,加強元件應用上之可焊性。
本論文中製程條件是以貴金屬(銀/鈀)電極及溶劑系統,使用Degussa公司之X7R AD292 及 MRA公司之NP0 VLF-220陶瓷粉,導入製成22微米以上厚度之陶瓷薄帶,在一連串大量相依之製程條件下,具備穩定最佳化之製程控制參數才可得到可靠的產出量。

Multilayer ceramic capacitors (MLCCs) are typically manufactured as follows:
First, stirring and mixing dielectric ceramic powders with a binder and a dispersion agent in a ball mill for several hours to prepare slurry having a desired viscosity.
Next, a green sheet is prepared by a doctor blade method, wherein, the slurry is discharged onto a carrier film through a small orifice and the carrier film is pulled under a doctor blade or a slot die, which is set at a particular height to obtain a desired sheet thickness. The sheet is then dried to produce the green sheet.
Then, a conductive paste is applied on a number of green sheets to form internal electrodes by screen-printing. The desired number of ceramic green sheets with internal electrodes are stacked and compressed to form a laminated body. The laminated body is then diced into a number of capacitor elements having a predetermined size. Thereafter the capacitor elements are through binder burnout and sintered then finally external electrodes are formed on opposite end portions of each of the capacitor elements to produce multiplayer ceramic capacitors.
Once terminated, MLCC is typically electro-plated with a layer of nickel followed by a layer of tin in order to be surface-mountable. Surface mounting is soldering of components onto PCBs. The nickel layer is typically referred to as the barrier layer. Although nickel is solderable, it does not readily dissolve in molten solder as silver does. The end terminals when the capacitors are soldered to PCBs. Tin coatings serve to protect the nickel from oxidation and to make components readily solderable.
Precious metal electrode (PME) system and solvent base are introduced in this report. Capacitors were fabricated from 22μm thick tapes consisting of ceramic powders (X7R AD292U, Degussa Corporation and NP0 VLF-220, MRA Laboratories, Inc.) that involves a sequence of a large number of processing steps, with production losses associated with each step. Optimized and controlled processing parameters can get reliable yield.

Chapter 1 Introduction………………………………………………. 1
Chapter 2 Theory and physical description…………………………. 7
2-1 The Dielectric Classification ………………………………... 7
2-2 The Basic Capacitor………………………………………… 13
2-3 Design rules for HV MLCCs ………………………………20
2-3-1 Layers Design …………………………………………….21
2-3-2 Surface Coating …………………………………………..23
2-3-3 Formulas and Stacking design ……………………………24
2-4 Failure modes ……………………………………………… 29
Chapter 3 MLCCs fabrication……………………………………… 31
3-1 Ceramic Slurry making…………………………………….. 32
3-2 Tape Casting ………………………………………………..34
3-3 Screen Printing…………………………………………….... 39
3-4 Stacking and Pressing ……………………………………….44
3-5 Cutting……………………………………………………… 48
3-6 Binder Burnout…………………………………………...…50
3-7 Sintering…………………………………………………….. 52
3-8 Wet Tumbling……………………………………….……… 54
3-9 Termination dipping and curing………………………...… 58
3-10 Plating…………………………………………………...… 61
3-11 Testing…………………………………………………….. 64
3-11-1 Cap and DF testing …………………………………..…64
3-11-2 Flash testing …………………………………………….64
3-11-3 Insulation resistance (IR) testing ………………………..66
3-11-4 Withstand voltage test …………………………………..67
3-12 Packing……………………………………………………. 69
Chapter 4 Conclusion……………………………………………… .71
References………………………………………………………..…73

List of Figures
Fig. 2-1 Dielectric property vs. Frequency…………………………………… 12
Fig. 2-2 Structure of MLCCs ………………………………………………… 14
Fig. 2-3 Equivalent electrical circuit …………………………………………15
Fig. 2-4 Loss Tangent in real capacitor……………………………………….. 15
Fig. 2-5 The voltage across the device into smaller voltages…………………20
Fig. 2-6 Chip Design for High Voltage Application…………………………. 21
Fig. 2-7 Destructive Physical Analysis (DPA) of 2-series Cap design and
equivalent circuit ………………………………………………….22
Fig. 2-8 Destructive Physical Analysis (DPA) of 6-series Cap design……… 22
Fig. 2-9 Failed symptom of dielectric breakdown of coated MLCC …………23
Fig. 2-10 A plan view illustrating a first internal electrode and a second internal electrode of MLCCS… ………………………………….…25
Fig. 2-11 Electrode pattern modification for high voltage rating ………….26
Fig. 2-12 ESR test result ……………………………………………………26
Fig. 2-13 Impulse /breakdown test result …………………………………...26
Fig. 2-14 Stacking structure…………………………………………………. 27
Fig. 2-15 The electrode pattern design for printing stencil………………….. 28
Fig. 3-1 Flow Chart of MLCCs Fabrication…………………………………. 31
Fig. 3-2 Materials prepare for milling……………………………………….. 34
Fig. 3-3 Slurry in the Ball mill container……………………………………. 34
Fig. 3-4 Ball mill machine…………………………………………………… 34
Fig. 3-5 Particle size analysis report…………………………………………. 35
Fig. 3-6 Ceramic slurry pumping to slot die…………………………………. 37
Fig. 3-7 Ceramic slurry attached to PET film………………………………... 37
Fig. 3-8 Input section of taping machine…………………………………….. 37
Fig. 3-9 Output section of taping……………………………………………. 38
Fig. 3-10 PET film and Reel of casting……………………………………… 38
Fig. 3-11 Disconnected electrode layer……………………………………… 39
Fig. 3-12 Good printing quality……………………………………………… 39
Fig. 3-13 Poor printing quality………………………………………………. 39
Fig. 3-14 Ceramic sheet before printing……………………………………... 41
Fig. 3-15 Ceramic sheet under printing……………………………………… 42
Fig. 3-16 Ceramic sheet after printing……………………………………….. 42
Fig. 3-17 Metal paste prepared for printing……………………………………... 42
Fig. 3-18 Apply the uniform paste for printing………………………………….. 43
Fig. 3-19 Squeegee printing…………………………………………………. 43
Fig. 3-20 Green sheets stacking machine……………………………………. 45
Fig. 3-21 Vacuum pack for Stacked sheets…………………………………... 45
Fig. 3-22 Loading on Isostatic pressing machine ……………………………45
Fig. 3-23 Outline of Isostatic pressing machine……………………………... 46
Fig. 3-24 Poor cutting quality………………………………………………... 48
Fig. 3-25 Cutting platform…………………………………………………… 48
Fig. 3-26 Green sheet with cutting mark…………………………………….. 49
Fig. 3-27 Break to single brick………………………………………………. 49
Fig. 3-28 programmable cutting machine……………………………………. 49
Fig. 3-29 Intrinsic defect……………………………………………………... 50
Fig. 3-30 BBO Ovens …………………………………………………………51
Fig. 3-31 Inside of BBO Ovens……………………………………………… 51
Fig. 3-32 Chips on the slabs prepare for firing………………………………. 52
Fig. 3-33 Slabs on kiln for chips firing……………………………………… 52
Fig. 3-34 Temperature profile of NP0 sintering…………………………… 53
Fig. 3-35 Temperature profile of X7R sintering……………………………... 53
Fig. 3-36 Selectable stage for Tumbling…………………………………….. 54
Fig. 3-37 Comparison of chip edges between with and w/o tumbling…….. 55
Fig. 3-28 Side view of the termination electrodes.
(a) With tumbling (b) Without tumbling………………………….. 55
Fig. 3-39 Parts with grinding balls…………………………………………… 56
Fig. 3-40 Sintered parts with grinding ball and DI water in the Container….. 56
Fig. 3-41 Tumbling machine…………………………………………………. 57
Fig. 3-42 Bakelite plate load with Chips……………………………………... 59
Fig. 3-43 Bakelite plate load on Dipping Jig…………………………………. 59
Fig. 3-44 Terminated chip pass thru curing furnaces………………………… 60
Fig. 3-45 Structure of Barrel plating…………………………………………. 62
Fig. 3-46 Auto plating line for MLCCs……………………………………… 62
Fig. 3-47 Mixing of iron ball and chips……………………………………… 63
Fig. 3-48 Plating barrels on the line………………………………………….. 63
Fig. 3-49 Flash test sequence………………………………………………… 66
Fig. 3-50 Capacitance test equipment……………………………………….. 69
Fig. 3 -51 Parts feeder……………………………………………………….. 69
Fig. 3-52 Waffle tray for chip ………………………………………………..70
Fig. 3-53 Taping to reel……………………………………………………… 70

List of Tables
Table 1-1 Ceramic versus other capacitors………………………………….. 3
Table 2-1 Class I Material: NP0 (Negative Positive Zero)
N750 (Negative 750) ……………………………………………7
Table 2-2 Class II Material: X7R, Y5V, Z5U ………………………………..8
Table 2-3 Typical Power Ratings…………………………………………... 19
Table 2-4 Comparison of DC and AC Dielectric Breakdown Voltage between standard parallel design and series design …………….22
Table 3-1 Weighing & Mixing parameter………………………………….. 33
Table 3-2 Parameters of Milling…………………………………………… 33
Table 3-3 Printer setting parameters……………………………………….. 41
Table 3-4 Stacker setting parameters………………………………………. 47
Table 3-5 Isostatic Pressing Profile………………………………………… 47
Table 3-6 BBO Heating Profile……………………………………………. 51
Table 3-7 Criteria of Plating……………………………………………… 61
Table 3-8 Test signal and criteria for difference dielectrics…………...…… 64
Table 3-9 IR values for various capacitance values…………………...…… 67
Table 3-10 The criteria of test voltage and leakage current for MLCCs with various rating voltage……………………………… ……...68

[1] Daniel N. Donahoe, et al., Failures in Base Metal Electrode (BME) Capacitors, in CARTS 2003: 23rd Capacitor and Resistor Technology Symposium, March 31 – April 3, 2003
[2] Daniel N. Donahoe, et al., Moisture induced degradation of multilayer ceramic capacitors, Microelectronics Reliability 46 (2006) 400–408
[3] Hong Cai, et al, Low-sintering composite multiplayer ceramic capacitor with X7R specification, Materials Science and Engineering B83 (2001) 137-141
[4] Galeb H. Maher; et al, Dielectric Properties of a Newly Developed Very Low Fired COG Dielectric for High Q and High Voltage Applications, Presented at CARTS USA, Palm Springs, CA – March 05
[5] R. Bansevicius, J.A. Virbalis, Distribution of electric field in the round hole of plane capacitor, Journal of Electrostatics 64 (2006) 226–233
[6] Yumin Xiang, The electrostatic capacitance of an inclined plate capacitor, Journal of Electrostatics 64 (2006) 29–34
[7] PingZhu, Field distribution of a uniformly charged circular arc, Journal of Electrostatics 63 (2005) 1035–1047
[8] Dang-HyokYoon, Burtrand I. Lee, Processing of barium titanate tapes with different binders for MLCC applications—Part II: Comparison of the properties, Journal of the European Ceramic Society 24 (2004) 753–761
[9] Mark C.Zaretsky, et al, Electrostatic assist for coating: the effect of surface resistivity, Journal of Electrostatics 61 (2004) 31–42
[10] Alfred I.Y.Tok, et al, Non-Newtonian fluid flow model for ceramic tape casting, Material Science and Engineering A280 (2000) 282-288
[11] Taho Yang and Ronald Van Olmen, Robust design for a multilayer ceramic capacitor screen-printing process case study, J. Eng. Design, Vol. 15. No5. October 2004, 447 -457
[12] A. W. Tavernor, et al, Improved Compaction in Multilayer Capacitor Fabrication, Journal of the European Ceramic Society 19 (1999) 1691-1695


[13] B.Peters, et al, Optimization of multi-layer ceramic capacitor geometry for maximum yield during binder burnout, Journal of Materials Science: Materials in Electronics 12 (2001) 403-409
[14] Ungyu Paik, et al, Binder removal and microstructure with burnout conditions in BaTiO3 based Ni-MLCCs, Ceramics International 29 (2003) 939-946
[15] Basavaraj V. Hiremath, Evaluation of Tumbling Processes of Multilayer Ceramic Capacitors for Surface Mount Device Applications, IEEE Transactions on components, Hybrids, and Manufacturing Technology, Vol.18.No.8, Dec.1993
[16] J.C.Lin, et al, On the resistance of silver migration in Ag-Pd conductive thick films under humid environment and applied d.c. field, Materials Chemistry and Physics 43 (1996) 256-265