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博碩士論文 etd-0216108-232336 詳細資訊
Title page for etd-0216108-232336
論文名稱
Title
可重組式平台之μC/OS-II嵌入式作業系統移植
Porting of μC/OS-II Embedded Operating System on a Reconfigurable Platform
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
55
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2008-01-03
繳交日期
Date of Submission
2008-02-16
關鍵字
Keywords
即時作業系統、嵌入式作業系統
μC/OS-II, OS4RS, Embedded Operating System, RTOS
統計
Statistics
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中文摘要
μC/OS-II作業系統是一個具有可攜帶性(portability)、可擴充性(scalability)、以及強取式的(preemptive)即時多工能力核心。在本論文中,我們將μC/OS-II作業系統移植到具有Virtex-II Pro FPGA 的ML310上,並進一步整合Virtex-II Pro FPGA 的部分重組態功能(partial reconfiguration)以完成一個OS4RS(Operating System for Reconfigurable System) 的雛形。
在μC/OS-II的移植過程中,我們主要移植了內文轉換,中斷,與時脈計時器方面的程式碼。在成功地移植μC/OS-II後,我們整合了μC/OS-II作業系統與FPGA的可重組式區域(partial reconfigurable regions)。在已經規劃好的FPGA四塊重組區域放置不同電路,讓電路可以在μC/OS-II控制下,針對目前系統的工作需求動態地組態載入到FPGA的重組區域中。最後,我們提出一套演算法來預測並提前組態載入未來將執行的電路,以節省電路組態載入的等待時間。透過模擬的方式,該演算法有效地改善了整體工作執行時間。
Abstract
μC/OS-II is a portable, scalable and preemptive real time kernel. In this paper, we describe the work of porting μC/OS-II to the Xilinx ML310 platform, which is equipped with a Virtex-II Pro FPGA. Moreover, we also present the accomplishment of an OS4RS (Operating System for Reconfigurable System) prototype by integrating μC/OS-II with the partial reconfiguration capability of the Virtex-II Pro FPGA.
For the porting of the μC/OS-II, we mainly port the code related to context switch, interrupt, and timer. Moreover, for the OS4RS prototype, we partition the FPGA into four regions and allow different circuits (i.e. hardware tasks) to be dynamically reconfigured (i.e. downloaded) into the regions under the control of μC/OS-II. Finally, we propose an algorithm to predict and pre-configure the hardware tasks so as to reduce the waiting time of task reconfiguration. According to the simulation results, the proposed algorithm can reduce the waiting time effectively.
目次 Table of Contents
致謝 III
中文摘要 IV
Abstract V
目錄 VI
圖目錄 VII
表目錄 VIII
第一章 簡介 1
1.1 前言與動機 1
1.2 論文結構 3
第二章 相關研究 4
2.1 RTOS介紹 4
2.2 MicroBlaze架構介紹 8
2.3 相關組態載入機制 10
第三章 設計與實作 12
3.1 μC/OS-II移植之系統設計 12
3.1.1 專案開發檔案結構 12
3.1.2 μC/OS-II軟/硬體架構 13
3.1.3 處理器相關程式碼撰寫 13
3.1.4 週邊資訊設定 21
3.1.5 軟硬體驅動支援 23
3.2 整合μC/OS-II與可重組式區塊系統 25
3.3 可重組式區塊系統之電路預先載入機制應用 28
第四章 系統測試與分析 33
4.1 實驗發展平台 33
4.2 μC/OS-II系統功能性測試 34
4.2.1 多重工作建立測試 34
4.2.2 訊息郵箱做為二元旗標號誌測試 35
4.2.3 系統任務服務之效能量測 37
4.3 可重組式區塊系統之電路預先載入機制測試 38
4.3.1 無預先載入之情形 40
4.3.2 預測上一個執行電路之情形 40
4.3.3 動態預測法之情形 41
4.3.4 各類電路組態載入選取之分析 42
第五章 結論與未來工作 44
參考文獻 45
參考文獻 References
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JUNE 2004.
[12] Xilinx Inc., "MicroBlaze Processor Reference Guide", Software, Available at
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[13] Xilinx Inc., "Getting started with EDK", Software, Available at
http://www.xilinx.com/edk.
[14] Xilinx Inc., "Xilinx: Design Tools Center", Software, Available at
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[15] Xilinx Inc., "Adding IP to a Hardware Design Lab: MicroBlaze Processor", Software, Available at http://www.xilinx.com/peripheral.
[16] Jean J. Labrosse, "MicroC/OS-II: The Real-Time Kernel", CMP Books, 2nd Edition, 2002.
[17] 林灶生/劉紹漢, "SOC 系統晶片設計/使用Xilinx EDK", 全華科技, 1nd Edition, p. 2.2–3.83, 2006.
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