本論文分為3個部分:
第一部分(第二章)為高頻模擬的激發方式的探討。我們在印刷電路板上實作一CPWG結構，與砷化鎵晶片上的微帶線結構，分別對其結構使用Wave port與G-S-G lumped port作為激發，實際量測的結果並與模擬做驗證比較。從比較結果得知Wave port在高頻的模擬不僅能以最少的時間並且可獲得較準確的實際結果，例如第二章的CPWG印刷電路板，量測的插入損失從10 MHz至67 GHz都與使用Wave port相近，如圖2.14所示，但G-S-G lumped port就只能預測到40 GHz，故基於此驗證結果，在之後的毫米波QFN設計上，都是採用Wave port作為設計時的激發源。
第二部分(第三章)為使用於毫米波頻帶的QFN設計。此處設計包含IC pad、鎊線、QFN lead與印刷電路板。藉由模擬我們得到此使用Ribbon bond及擬改善QFN之不連續處的反射損失從DC到60GHz，都在-20dB以下，而插入損失從DC到60GHz，都小於0.4dB。並且運用其設計原理去改善傳統商用QFN結構。最後介紹萃取其不連續處的方法並且以量測與模擬作驗證。因為是商用QFN的因素，反射損失到達-20 dB從DC到20 GHz以下，插入損失從DC到22 GHz以下小於0.5 dB。
第三部分(第四章)使用陶瓷基板晶片，介紹其貫穿孔阻抗之萃取與探討die attach對單根或多根貫穿孔電感之影響。其中包括如何降低封裝內部地回流路徑上的電感、使用金屬銅與銀膠的比較和多根貫穿孔的使用。
最後是結論與未來工作

There are three parts in this thesis:

In the first part (Chapter 2), we discuss the port excitation (Wave port vs Lumped port) suitable for sub-millimeter wave operations. We realized on printed circuit board a grounded coplanar waveguide (CPWG) and on gallium arsenic (GaAs) a microstrip line. We performed simulation on these structures using high frequency structure simulator (HFSS), and compared the results with measured ones. From the comparison, we found close match for CPWG insertion loss from 10 MHz to 67 GHz using the Wave port. However, for G-S-G lumped port, only matched up to 40 GHz. The wave port not only was more accurate, but also consumed less time in simulation. Consequently, we employed wave port as our simulation excitation for our sub-millimeter wave QFN design.

In the second part (Chapter 3), we focused on design of low cost QFN for sub-millimeter wave applications. We fabricated test structures, which include IC pads and transmission lines, wire bonds, QFN leads, and G-S-G structures on printed circuit board. In HFSS simulation, our specially designed ribbon bonds and QFN configuration show return loss less than -20dB and insertion loss less than -0.4 dB up to 60 GHz. Using the same design principles, we strived to improve the performance of a commercially available QFN, which normally operates at 3 to 6 GHz. The extraction method to obtain the high frequency characteristics was introduced first, and the characteristics of a commercially available QFN (with our wire bond configuration) were then obtained. The insertion loss was less than -20 dB and insertion loss less than -0.5 dB up to 20 GHz. In Chapter 5, we discuss the performance discrepancies between the simulated ribbon bond results and that for fabricated wire bonds.

In the third part (Chapter 4), we introduced a method to extract the characteristics of a single backside via and investigated the effects of die attachment on the performance of a single and multiple backside via(s). Using silver epoxy and Cu blank layer as die attach methods, we found it was important to provide a broad path (Cu blank layer), as opposed to a restrict path (like silver epoxy) to reduce the inductance of the backside vias.

The conclusion and future work are provided in Chapter 5.

誌謝 ii
摘要 iii
Abstract iv
圖表目錄 viii
第一章 緒論 1
1.1 研究背景與動機 1
1.2 四方扁平封裝(Quad-flat no-leads)介紹 3
1.2.1 結構介紹 3
1.2.2 連接型式 5
1.3 研究技術 6
1.4 論文章節規劃 9
第二章 3D電磁模擬軟體於設定上準確性的探討 10
2.1前言 10
2.1.1 軟體簡介 10
2.1.2 邊界條件 12
2.1.3 激發型式 12
2.2 探討不同激發方式於CPWG型式下的量測與模擬結果的比較 16
2.3 探討不同激發方式於傳輸線型式下的量測與模擬結果的比較 22
2.3.1 量測與模擬比較 24
2.4 章節與討論 26
第三章 毫米波頻帶之QFN封裝不連續特性之萃取 27
3.1 前言與目的 27
3.2 使用Ribbon bond打線型式與改良傳統QFN封裝結構 27
3.2.1 模擬環境 28
3.2.2 模擬結果 30
3.3 商用QFN的訊號不連續處特性改善 34
3.3.1 改變PCB上的金屬走線 34
3.3.2 封裝鎊線使用G-S-G型式 36
3.3.3 訊號使用多根 wire bond的改善 39
3.4 不同材質的鎊線與不同介電係數的epoxy於毫米波頻帶封裝效應的探討 41
3.5 封裝的訊號不連續處特性之萃取與整體訊號路徑的去嵌化 44
3.5.1 Through-Line-Line (TLL)去嵌化技術 45
3.5.2 晶片上微帶線的去嵌化 48
3.6 封裝訊號不連續處模擬與量測的萃取結果分析 50
3.7 章節與討論 53
第四章 晶片接地電感的探討 54
4.1 陶瓷基板簡介 54
4.1.1 量測方法介紹 55
4.1.2 量測結果分析 58
4.1.3 驗證 62
4.2 探討不同材料下回流路徑的影響 63
4.2.1 量測結果比較 65
4.3 比較單一鎊線與單一貫穿孔的阻抗 69
4.4 章節與討論 72
第五章 結論與未來工作 73
參考文獻 75

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