在這篇論文中，我們將研究低溫複晶矽薄膜電晶體（LTPS TFTs）在經過電性stress後的劣化機制。樣品為奇美公司所提供ELA TFTs，電致劣化可以分為直流以及交流兩種。首先，在AC stress方面，此實驗有些機制不能完全由NBTI機制所解釋，除了NBTI外，我們也把自我加熱效應(self-heating effect)考慮進去，因為自我加熱效應會造成通道溫度上升，焦耳熱使得poly-Si/SiO2界面的矽氫鍵分離；我們也比較脈衝(pulse)作用在不同位置(閘極或汲極)造成的差異。
在DC stress方面，我們在此實驗的stress條件，閘極偏壓固定在-15V並改變汲極偏壓，看它對劣化造成的影響；我們的量測方法一種為汲極和源極的定義跟stress條件相同，此論文稱正掃(forward)，另一種汲極和源極的定義跟stress條件相反，稱反掃(reverse)，藉由正掃和反掃來分析此實驗異常的NBTI劣化結果。

In this thesis, we will investigate the degradation of the Low-Temperature-Polycrystalline-Silicon TFTs(LTPS TFTS) under the electrical stress. The devices are offer by Chi Mei Optoelectronics. The two mechanisms of the electrical stress are AC and DC stress. On the AC stress, there are some phenomena which cannot be completely explained by typical NBTI mechanism in the experiment. In addition to NBTI, we suggest that the self-heating effect might be involved, because the self-heating effect could rise channel temperature and cause the dissociation of the Si-H bonds at the poly-Si/SiO2 interface due to the Joule heating. We also compare pulse to give on the degradation difference of different place.
On the DC stress, we show the stress drain voltage dependence of on-current and threshold voltage degradation, in which the stress gate voltage was fixed at -15V and stress time was 2154 s. The electric measurements of forward and reverse modes were employed to analyze the experimental data. The anomalous negative bias temperature instability degradation of poly-Si TFTs was investigated.

Content
Chinese Abstract
English Abstract
Tables Captions
Figures Caotions
Chapter 1- Introduction
1.1 Overview
1.2 Motivation
1-3 Introduction of Negative Bias Temperature Instability
Chapter 2- Device fabrication and electrical characterization
2.1 Device Fabrication
2.1.1 Technology of ELA Crystallization
2.1.2 Fabrication Processes of LTPS Poly-Si Device
2.2 Defects in polycrystalline-silicon film
2-3. Basic characterization of the LTPS TFT
2.3.1 The I-V transfer characteristics
2.3.2 The C-V transfer characteristics
2-4. Introduction of Seto’s model
Chapter 3- Instruments and device parameter extraction
3.1 Instruments and measurement setup
3.1.1 Instruments
3.1.2 Set up instruments for I-V
3.2 Methods of Device Parameter Extraction
3.2.1 Determination of the threshold voltage
3.2.2 Determination of the field-effect mobility
3.2.3 Determination of on/off current ratio
3.2.4 Determination of the subthreshold swing
3.2.5 Determination of the trap densit
Chapter 4- Results and Discussion
4.1 The influence of AC stress in LTPS TFTs
4.1.1 The Degradation of P-channel TFT under pulse
4.1.2 The self-heating effect
4.1.3 The pulse in drain and in gate
4.2 The influence of DC stress in LTPS TFTs
4.2.1 The anomalous device characteristics
4.2.2 Explain the anomalous device characteristics
Chapter 5- Conclusion
Reference
Tables
Figures

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