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博碩士論文 etd-0309115-161048 詳細資訊
Title page for etd-0309115-161048
論文名稱
Title
寬頻電力線通訊系統之實現
Implementation of the broadband Power Line Communication system
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
53
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2015-06-26
繳交日期
Date of Submission
2015-07-22
關鍵字
Keywords
電力線通訊、正交幅度調變、矩陣式交錯器、標準元件設計流程、錯誤更正碼
block interleaver, quadrature amplitude modulation, Power Line Communication, error correcting code, cell-based design flow
統計
Statistics
本論文已被瀏覽 5685 次,被下載 36
The thesis/dissertation has been browsed 5685 times, has been downloaded 36 times.
中文摘要
近年來,隨者數位家庭的概念一再的被提起,透過網路來連接家電產品,提供各項新的服務,例如:居家照護,數位娛樂,能源管理,居家安全等。在其中扮演關鍵腳色的就是電力線通訊。電力線通訊使用既有的電力線傳輸資料,因此不需要額外布線。本論文使用標準元件設計流程實做寬頻電力線通訊系統,傳送端包含打散器,迴旋碼編碼器,矩陣式交錯器,正交幅度調變器,加入循環字首。接收端包含移除循環字首,正交幅度解調變器,矩陣式解交錯器,迴旋碼解碼器,解打散器。實驗結果證明在不同雜訊干擾下,仍具有錯誤更正能力。當訊號雜訊比為0dB時,位元錯誤率為0.457。而當訊號雜訊比為10dB時,位元錯誤率為0.0001。本論文採用TSMC 90nm製程,總面積為94188um2,功率消耗為8.85mW。
Abstract
Digital home has been mentioned a lot in recent years. We can connect appliances through the internet to provide new services such as home care, digital entertainment, power management, and home safety, etc. Power Line Communication plays an important role in it. Power Line Communication uses the existing wires to transmit data, so there is no need to put extra wires. This thesis uses cell-based design flow to implement the broadband Power Line Communication system. The transmitter includes scrambler, convolutional encoder, block interleaver, quadrature amplitude modulator, and add cyclic prefix. The receiver includes remove cyclic prefix, quadrature amplitude demodulator, block deinterleaver, convolutional decoder, and descrambler. The experiment result shows that under different noisy channel, this design still has error correction ability. When signal to noise ratio is 0dB, bit error rate is 0.457. When signal to noise ratio is 10dB, bit error rate is 0.0001. This thesis uses TSMC 90nm process. The total area is 94188 um2, the power dissipation is 8.85mW.
目次 Table of Contents
論文審定書 i
摘要 ii
ABSTRACT iii
目錄 iv
圖目錄 vi
表目錄 viii
第1章 緒論 1
1.1 研究背景 1
1.2 論文組織 2
第2章 電力線通訊 3
2.1 簡介 3
2.2 G3-PLC 6
2.3 Homeplug AV 6
2.4 Homeplug AV2 9
第3章 電力線通訊系統實作 11
3.1 系統架構 11
3.2 打散器 11
3.3 錯誤更正碼 13
3.3-1 (2,1,2)迴旋碼編碼 13
3.3-2 (2,1,3)迴旋碼編碼 16
3.3-3 迴旋碼解碼 18
3.4 交錯器 21
3.4-1 矩陣式交錯器 23
3.5 調變 25
3.5-1 單載波調變 25
3.5-2 正交幅度調變 27
3.6 循環字首 32
第4章 實驗結果 34
4.1 驗證流程 34
4.2 位元錯誤率的效能分析與比較 34
4.3 合成數據 36
4.4 時鐘樹合成結果 37
4.5 功率分析 38
4.6 IR-drop分析 39
4.7 Electromigration分析 40
4.8 FPGA驗證結果 41
第5章 結論和未來研究方向 42
5.1 結論 42
5.2 未來研究方向 42
參考文獻 43
參考文獻 References
[1] S. Gall, O. Logvinov, “Recent Developments in the Standardization of Power Line Communications within the IEEE,” IEEE Communication Magazine, pp. 64-71, July. 2008.
[2] HomePlug AV2 Specification, HomePlug Powerline Alliance, 2012.
[3] 李淑敏、郭可驥、王朝欽與陳朝順,2008,節能通信 IC 晶片開發與智慧型電能管理系統整合研究,NSC98-2220-E-110-009.
[4] HomePlug 1.0 Specification, HomePlug Powerline Alliance, 2001.
[5] Y. C. Kim, J.N. Bae, and J.Y. Kim, “Performance of power line communication systems with noise reduction scheme for smart grid applications,” IEEE Trans. on Consumer Electronics, vol. 57, no. 1, pp. 46-52, Feb. 2011.
[6] K. Razazian, M. Umari, A. Kamalizad, V. Loginov, and M. Navid, “G3-PLC specification for powerline communication: Overview, system simulation and field trial results,” in Proc. of IEEE International Symp. on Power Line Communications and Its Applications, pp. 313-318, 2010.
[7] HomePlug AV Specification, HomePlug Powerline Alliance, 2006.
[8] H. A. Latchman, S. Katar, L.Yonge, S. Gavette, “Homeplug AV and IEEE 1901: A Handbook for PLC Designers and Users,” Wiley, 2013.
[9] JianWei Chen, Hongchin Lin, and Yun-Ching Tang, “Efficient high-throughput architectures for high-speed parallel scramblers,” in Proc. of IEEE International Symp. on Circuits and Systems, pp. 441-444, 2010.
[10] S. Haykin, Communication Systems, 4th ed. Wiley, 2001.
[11] Fei Sun and Tong Zhang, “Low-Power State-Parallel Relaxed Adaptive Viterbi Decoder,” IEEE Trans. on Circuits and Systems I: Regular papers, vol. 54, no. 5, pp. 1060-1068, May. 2007.
[12] M. A. Khan, M. Asim, V. Jeoti, and R. S. Manzoor, “A Novel Seed Based Post Modulation Interleaver: Design and Analysis,” International Conference on Intelligent and Advanced Systems, pp. 1-6, 2010.
[13] K. N. Pappi, A. S. Lioumpas, and G. K. Karagiannidis, “θ-QAM: A parametric quadrature amplitude modulation family and its performance in AWGN and fading channels,” IEEE Trans. on Communications, vol. 58, no. 4, pp. 1014-1019, April. 2010.
[14] 鈦思科技,通訊系統設計與模擬使用MATLAB/Simulink. 臺北市: 鈦思科技股份有限公司, 2007.
[15] Anindya Majumder and James Caffery, Jr., “Power line communications: an overview,” IEEE Potentials, vol. 23, no. 4, pp. 4-8, Oct. 2004.
[16] M. Ouzzif and J. L. Masson, “Statistical analysis of the Cyclic Prefix impact on indoor PLC capacity,” in Proc. of IEEE International Symp. on Power Line Communications and Its Applications, pp.285-289, 2009.
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