本論文之研究方向分為兩部分，第一部分為探討通孔傳輸訊號之功率損耗，第二部分為探討3D Integration中矽導孔 (Through Silicon Via, TSV)傳輸訊號之功率損耗。在印刷電路板中訊號藉由通孔來連接各個訊號層，常見的問題為回流路徑不連續與寄生電容導致訊號功率損耗增加，本論文針對印刷電路板中的通孔進行訊號完整性分析，首先利用有限元素模擬軟體HFSS (High Frequency Structural Simulator)進行模擬，取得散射參數，其次觀察訊號的傳輸、反射與損耗，並探討在通孔周圍加入Shorting Via與去耦合電容之情形，並從結果中討論數目和距離對於改善回流路徑不連續之影響。研究結果顯示Shorting Via與去耦合電容之數目增加皆有利於減少功率損耗，且與通孔之距離愈近也有較好的改善效果。關於第二部分，由於晶片之材料一般是使用低電阻率的矽，在此情況下矽與TSV之間會產生寄生電容，導致訊號藉由TSV垂直傳遞時會有很大的功率損耗。本論文針對TSV進行訊號完整性分析，除了利用有限元素模擬軟體HFSS進行模擬取得散射參數外，還推導TSV之等效電路模型，探討的內容針對TSV之幾何與材料參數對散射參數之影響，研究結果顯示本論文之模擬與理論結果相互吻合，更證實本論文研究結果的正確性。

This study consists of two parts. First part is about the through via in printed circuit board (PCB). In the PCB, signal transmission between different layers occurs by way of through via. The excessive capacitance is generated near the through via. Such capacitance influences the signal transmission between different layers. Through via also cause return current path discontinuous. It excites parasitic transverse electromagnetic modes in PCB. Both excessive capacitance and return current path discontinuous cause the power loss. Some techniques solving this problem are discussed. Finite element method (FEM) is used to simulate the high frequency electromagnetism and extract the S-parameters. S-parameters are used to describe the electrical behavior of through via. By these model, we want to predict the signal transmission performance of the through via structure.
Second part is about through silicon via (TSV). TSV which is used to connect stacked chips in a vertical fashion become the heart of this technique, because there are big signal attenuation in the wire bonding approach and large solder balls in the flip-chip. When a high frequency signal is transmitted vertically through the substrate via, low resistivity silicon substrate will cause significant signal attenuation and lead poor ratio frequency (RF) performance. 3D electromagnetic field solver is employed to build up finite element models. Equivalent circuit model is also used to simulate the electrical performance of TSV. The impact of different TSV shapes and materials on electrical performance is evaluated by using S-parameters. By these models, we want to propose an accurate finite element model to predict electrical performance of TSV and easily design 3D IC integration for designer.

論文審定書 i
誌謝 ii
摘要 iii
Abstract iv
目錄 v
圖目錄 viii
表目錄 xiv
第一章 緒論 1
1.1 研究主旨 1
1.2 研究動機 4
1.3 現況與挑戰 10
1.4 研究背景 14
1.5 論文結構 16
第二章 文獻回顧 17
2.1 通孔研究之國內外研究狀況 17
2.1.1 重要文獻 17
2.1.2 國外相關重要文獻 17
2.2 TSV研究之國內外研究狀況 24
2.2.1 重要文獻 24
2.2.2 國外相關重要文獻 24
2.3 總結 34
第三章 模擬與分析基礎理論 35
3.1 研究方法 35
3.1.1 印刷電路板通孔模擬 35
3.1.2 Through Silicon Via模擬 36
3.2 常見的電磁模擬方法 38
3.2.1 矩量法 (Method of Moment, MoM) 38
3.2.2 有限元素法 (Finite Element Method, FEM) 38
3.2.3 有限時域差分法 (Finite Different Time Domain, FDTD) 39
3.3 電磁理論 40
3.4 Network Theory 43
3.4.1 開路阻抗參數 (Z-parameter) 44
3.4.2 散射參數 (S-parameter) 47
3.5 總結 53
第四章 通孔之模擬結果與討論 54
4.1 通孔有限元素模型介紹 54
4.2 模擬結果與討論 56
4.2.1 四層板初步模擬結果與討論 56
4.2.2 測試樣品與模擬比較 59
4.2.3 Shorting Vias 61
4.2.4 五層板模擬結果與討論 64
4.2.5 去耦合電容 (Decoupling Capacitor)模擬結果與討論 69
4.3 總結 72
第五章 TSV之模擬結果與討論 73
5.1 TSV有限元素模型介紹 73
5.2 TSV之等效電路模型 76
5.3 TSV模擬結果 81
5.3.1 TSV高度變化 81
5.3.2 TSV半徑變化 85
5.3.3 Scaling Ratio變化 90
5.3.4 Tapered TSV角度變化 95
5.3.5 Annular TSV之銅層厚度變化 101
5.3.6 TSV形狀比較 103
5.3.7 TSV陣列探討 106
5.4 Coaxial TSV 109
5.4.1 Coaxial TSV與TSV Pair比較 109
5.4.2 矽基板電阻率比較 112
5.4.3 金屬導體材料比較 114
5.5 總結 116
第六章 結論與未來展望 117
6.1 結論 117
6.2 未來展望 119
參考文獻 121

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