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博碩士論文 etd-0503116-141706 詳細資訊
Title page for etd-0503116-141706
論文名稱
Title
一種可變增益的基頻超再生放大電路之設計與評估
Design and evaluation of a baseband superregenerative amplification circuit for variable gain
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
84
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2016-05-27
繳交日期
Date of Submission
2016-06-03
關鍵字
Keywords
超再生放大器、指數充電、可變增益、生理信號、寄生電容
parasitic capacitance, physiological signals, variable gain, exponential charging, superregenerative amplifier
統計
Statistics
本論文已被瀏覽 5718 次,被下載 23
The thesis/dissertation has been browsed 5718 times, has been downloaded 23 times.
中文摘要
生理訊號的特性為低頻率以及低振幅,一個中等帶寬和高增益的放大器是有利於讀取生理訊號,加入可變增益的方式則可以根據需求來處理不同的生理訊號。本論文將介紹一種可變增益以及用於訊號放大的集成電路(ASIC)之設計與評估,這個電路採用了基頻超再生放大的原理來產生一個取樣輸出,該輸出的頻寬以及增益呈現方式是由透過取樣訊號的頻率以及週期來決定,此電路可以用於放大生理訊號像是整合紀錄或監測系統的一部分,分析電路的原理以及規範實現於台積電0.18um 製程技術,電路整合了一個內部帶隙參考電壓電路,一個運算轉導放大器和取樣保持電路,時鐘相位變化是藉由一個外部的PIC微控制器提供,其有效面積為約0.015 mm²,可變增益範圍10-1102 V/V,使用±1.5V電源其功率消耗為2.95μW。此測試的ASIC功能主要受限於晶片角位的寄生電容,這個影響將被討論並列入電路的評估。
Abstract
This thesis describes the design and evaluation of an integrated circuit (ASIC) for signal amplification with variable gain. The circuit employs the principle of baseband superregenerative amplification which yields a sampled output with a bandwidth and gain determined by the frequency and duty cycle of the sample clock. It is a potentially useful circuit for amplifying physiological signals as part of an integrated recording or monitoring system. The circuit principle is analyzed and a prototype is implemented in TSMC 0.18 μm CMOS technology consisting of a bandgap voltage reference, an operational transconductance amplifier and sample and hold circuit. An off-chip microcontroller provides the control clocks. The active area is about 0.015 mm², the power consumption is 2.95 μW using ±1.5 V supplies and variation of gain from 10-1102 V/V is achieved. This test ASIC functionality is mainly limited by parasitic pin capacitance. This effect is discussed and included in the circuit evaluation.
目次 Table of Contents
審定書 i
致謝 ii
摘要 iii
Abstract iv
Contents v
List of Figures viii
List of Tables xiii
Chapter 1 Introduction 1
1.1 Background, motivation, and contributions 1
1.2 Thesis organization 3
Chapter 2 Circuit Operating Principle and Analysis 5
2.1 Introduction of superregenerative amplification 5
2.2 Operational Transconductance Amplifier 6
2.3 OTA configurations realizing positive and negative resistance 7
2.4 Sample and hold circuit 9
2.5 Superregenerative amplifier configuration with input load 11
2.6 Superregenerative amplifier configuration with load at the output 13
2.7 Comparison between input and output load configuration 16
2.8 Effect of feedback on power consumption 16
Chapter 3 Circuit design and simulation 18
3.1 Circuit structure 18
3.2 Bias stage 19
3.2.1 On-chip reference circuit 21
3.3 Operational transconductance amplifier stage 24
3.3.1 Transconductance simulation 27
3.4 Sample and hold stage 31
3.5 Overall superregenerative amplifier design 34
3.6 Effect of parasitic capacitance 39
3.7 Circuit Layout 43
Chapter 4 Measurement Results 44
4.1 Microscope image of the chip 44
4.2 Measurement PCB board 46
4.3 Measurement of effect capacitance 47
4.4 OTA transconductance measurement 50
4.5 Measurement of gain 51
4.6 Linearity comparison with different feedback factors 55
4.7 Dynamic response 58
Chapter 5 Conclusions and Future work 64
5.1 Conclusions 64
5.2 Future work 65
References 67
參考文獻 References
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[7] R. de Sousa, “A variable-gain superregenerative amplifier controlled by duty-cycle for signal conditioning,” Analog Integrated Circuits and Signal Processing, Vol. 82, No. 2, pp 423-430 , February 2015.
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[11] S.H. Ou, “Design of CMOS voltage-to-time converter for CM/DM analog-to-digital conversion ” M.Eng. thesis, NSYSU, Kaohsiung, R.O.C, 2013.
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[13] E.M. Camacho-Galeano, C. Galup-Montoro, and M. C. Schneider, “A 2-nW 1.1-V self-biased current reference in CMOS technology ” IEEE Trans. Circuits and Systems—II: Express Briefs, vol. 52, no. 2, pp.61-65, February 2005.
[14] R.R. Harrison, and C. Charles, “A Low-Power Low-Noise CMOS Amplifier for Neural Recording Applications,” IEEE J. Solid-State Circuits, vol. 38, no. 6, pp. 958 - 965, June 2003.
[15] Microchip, “PIC16(L)F1782/3 28-Pin 8-Bit Advanced Analog Flash Microcontroller”, Microchip Technology Inc., 2011-2014.”
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