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博碩士論文 etd-0608113-213119 詳細資訊
Title page for etd-0608113-213119
論文名稱
Title
適用電池管理系統之高壓多工器與連續逼近類比數位轉換器
A High-Voltage Multiplexer and A Successive-Approximation Register Analog to Digital Converter for BMS
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
73
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2013-06-27
繳交日期
Date of Submission
2013-07-10
關鍵字
Keywords
高壓多工器、電荷重配電容、連續逼近類比數位轉換器、電池管理系統、高壓開關
BMS, high-voltage multiplexer, charge redistribution architecture, successive-approximation register ADC, high-voltage switch
統計
Statistics
本論文已被瀏覽 5718 次,被下載 343
The thesis/dissertation has been browsed 5718 times, has been downloaded 343 times.
中文摘要
本論文包含兩個主題,均以電池管理系統(Battery management systems, BMS)所需之周邊電路相關。其一為電池電壓偵測之高壓多工器,而另一研究主題則是連續逼近類比數位轉換器。以上兩個主題皆以TSMC 1P3M 0.25 μm 60V HV CMOS製程下線與實現。

第一個主題探討一電池管理系統中電池電壓偵測之高壓多工器。在一般高壓製程中通常CMOS有閘極與源極間跨壓限制,本論文設計之高壓多工器中提出一具閘極電壓驅動器,以及降壓器之高壓開關,使高壓多工器在操作時避免有閘極與源極間產生過壓問題。另因考慮輸出後端類比數位轉換器之輸入範圍,所以本設計包含電壓除法器、電壓減法器及電壓乘法器。本設計適用於6 ~ 8個磷酸鋰鐵或鋰三元電池芯(Battery cell)之電池管理系統,其電壓偵測誤差在模擬中小於10 mV。

第二個主題係應用於電池管理系統中電池電壓偵測之連續逼近類比數位轉換器,為前述第一個主題之後端電路。因電池電壓變化緩慢特性,故本論文提出一操作頻率512 KHz,取樣頻率20 KHz之連續逼近類比數位轉換器,此設計具有12位元解析度,為了減少電容的使用量而採用單組電容之電荷重配電容架構。而本設計模擬結果其積分非線性(Integral Nonlinearity, INL)與微分非線性(Differential Nonlinearity, DNL)皆小於兩個最小有效位元(Least Significant Bit, LSB),因此誤差可小於1 mV。
Abstract
This thesis includes two designs: A high-voltage (HV) multiplexer and a successive-approximation register ADC for Battery Management Systems (BMS). The proposed designs are implemented by using TSMC 0.25 μm 60V HV CMOS process, and verified by physical measurements.
Though the first topic presents a high-voltage multiplexer which is fabricated using an advanced high-voltage (HV) semiconductor process, the HV process usually is constrained by the voltage drop limitation between gate and source of HV CMOS transistors. To overcome such a limitation, a high-voltage switch is proposed in this work, including two gate voltage drivers and a buck converter driving the HV devices without causing any over-voltage hazard. Based on the system requirements, the output range of the HV multiplexer should be covered by the input range of the following ADC. The multiplexer employs a divider & subtracter and a multiplier to carry out such a function. The entire design is designed for the voltage detection circuit in the Battery Management Systems, where the voltage detection error is verified to be less than 10 mV by simulations.
The second topic discloses a successive-approximation register ADC for the voltage detection as well in the Battery Management Systems. Due to the gentle variation of the battery voltage characteristic, an ADC with 20 KHz sampling rate and 12–bit resolution is proposed and used in the detection circuit. To reduce the capacitor size in the ADC, a single capacitor array based on the charge redistribution architecture is used in the proposed ADC. By the simulation results, the integral nonlinearity (INL) and the differential nonlinearity (DNL) of the proposed ADC are both less than two LSBs such that the error is less than 1 mV.
目次 Table of Contents
摘要 i
Abstract ii
目錄 iii
圖次 v
表次 viii
第一章 概論 1
1.1 前言 1
1.2 相關技術與文獻探討 4
1.2.1 高壓多工器之技術與探討 4
1.2.2 連續逼近類比數位轉換器之技術與探討 7
1.3 研究動機 10
1.4 論文大綱 11
第二章 適用於電池量測之高壓多工器 12
2.1 簡介 12
2.2 高壓多工器之架構 13
2.3 高壓多工器電路設計 15
2.3.1 解碼器 15
2.3.2 高壓開關級 16
2.3.3 高壓開關 16
2.3.4 閘極電壓驅動器 18
2.3.5 降壓器 19
2.3.6 電壓除法器、電壓減法器電路 20
2.3.7 低壓多工器 21
2.3.8 低電壓乘法器 22
2.3.9 具電流開關之運算放大器 23
2.4 電路模擬與預計規格 24
2.4.1 電路模擬結果 24
2.4.2 預計規格與文獻比較 30
2.5 晶片佈局 32
2.6 晶片實作與量測結果 33
2.7 結果與討論 39
第三章 連續逼近類比數位轉換器 40
3.1 簡介 40
3.2 連續逼近類比數位轉換器 40
3.3 連續逼近類比數位轉換器電路設計 43
3.3.1 比較器電路 43
3.3.2 遲滯比較器 44
3.3.3 時脈式比較器 44
3.3.4 複合式數位類比轉換器 45
3.3.5 電阻串式數位類比轉換器 46
3.3.6 連續逼近控制器 47
3.4 電路模擬與預計規格 50
3.4.1 電路模擬結果 50
3.4.2 預計規格與文獻比較 52
3.5 晶片佈局 54
3.6 結果與討論 55
第四章 研究成果與討論 56
參考文獻 59
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