本論文主要係針對傳輸介面電路設計，包含兩個主題: 適用FlexRay 系統之具
共模電壓調節與漏電流防護接收器，與具有製程、溫度、電壓、漏電流(PVTL)
補償和電壓迴轉率自動校正之2 倍VDD 輸出緩衝器。

第一個討論的技術為適用FlexRay 系統之具共模電壓調節與漏電流防護接收
器，主要分為: 共模電壓調節電路、過壓保護電路與判斷電路，共模電壓調節電路
係針對輸入範圍-10 V 至+15 V 所設計，使高於系統電壓的輸入範圍調節成系統
可以正常工作之電壓，並且可以防止漏電流，而過壓保護電路是保護該系統可以
承受±60 V電壓，判斷電路則是用以判斷接收器的當前狀態為何。

第二個提出的技術為具有PVTL 補償和電壓迴轉率自動校正之2 倍VDD 輸
出緩衝器，利用PVTL 補償，可以控制輸出級的電流大小，當電壓迴轉率過低時，
開啟額外的充放電路徑，當電壓迴轉率過高時，關閉額外的充放電路徑，如此一
來可以減少電壓迴轉率的變異。

This thesis is mainly aimed at circuit designs for communication interfaces, including two topics, namely a receiver with common mode voltage regulation and leakage protection for FlexRay systems, and slew rate self-adjusted 2×VDD output buffer with PVTL compensation.

The first design is a receiver with common mode voltage regulation and leakage protection for FlexRay systems. It consists of a common-mode voltage adapter circuit, an over-voltage protector and a decision circuit. The input range of the voltage adapter circuit is clamped to -10 V to +15 V. The over-voltage protector ensures the system to sustain ±60 V surges on the input lines. The current state of receiver is determined by the Decision circuit.

The second topic is a slew rate self-adjusted 2×VDD output buffer with PVTL compensation.With proposed PVTL compensation, the driving current of output stage is automatically adjusted. When the slew rate drops, extra paths of charging and discharging will be turned on. By contrast, if the slew rate goes up, certain paths of charging and discharging will be closed. The variation of the slew rate is justified to be reduced.

[論文審定書+ i]
[中文摘要+ii]
[英文摘要+ iii]
[目錄+ iv]
[圖次+viii]
[表次+xiii]
[1 概論+1]
[1.1 前言+1]
[1.2 相關技術與文獻探討+6]
[1.2.1 FlexRay通訊協定技術分析+6]
[1.2.2 具有PVTL 補償之2 倍VDD輸出緩衝器+10]
[1.3 研究動機+13]
[1.3.1 適用FlexRay系統之具共模電壓調節與漏電流防護接收器+13]
[1.3.2 具有PVTL 補償和電壓迴轉率自動校正之2 倍VDD 輸出緩衝器+13]
[1.4 論文大綱+14]
[2 適用FlexRay 系統之具共模電壓調節與漏電流防護接收器+15]
[2.1 簡介+15]
[2.2 適用FlexRay 系統之具共模電壓調節與漏電流防護接收器+18]
[2.2.1 共模電壓調節電路+19]
[2.2.2 過壓保護電路+20]
[2.2.3 判斷電路+21]
[2.2.4 具磁滯效應之軌對軌共模輸入範圍比較器+22]
[2.3 模擬結果與分析+24]
[2.3.1 晶片佈局+24]
[2.3.2 共壓調節電路模擬+25]
[2.3.3 接收器之閒置與資料傳輸訊號模擬+28]
[2.3.4 過壓保護模擬+32]
[2.3.5 漏電流防護模擬+36]
[2.3.6 預計規格與文獻比較+36]
[2.4 結果與討論+38]
[3 具有PVTL 補償和電壓迴轉率自動校正之2 倍VDD 輸出緩衝器+40]
[3.1 簡介+40]
[3.2 具有PVTL 補償和電壓迴轉率自動校正之2 倍VDD 輸出緩衝器架構+41]
[3.2.1 PVT 偵測器+42]
[3.2.2 2 倍VDD 輸出級+43]
[3.2.3 數位邏輯電路+47]
[3.2.4 漏電流補償電路+48]
[3.3 具有PVTL 補償和電壓迴轉率自動校正之2 倍VDD 輸出緩衝器模擬+50]
[3.3.1 晶片佈局+50]
[3.3.2VPAD電壓訊號可傳輸之最快頻率模擬+51]
[3.3.3 閘極漏電流模擬+52]
[3.3.4 電壓迴轉率變異改善模擬+53]
[3.3.5 預計規格+54]
[3.4 晶片實作與量測+55]
[3.4.1 晶片照相+55]
[3.4.2 量測環境+56]
[3.4.3 晶片量測+56]
[3.5 結果與討論+60]
[4 總結與未來研究方向+62]
[4.1 適用FlexRay 系統之具共模電壓調節與漏電流防護接收器+63]
[4.2 具有PVTL 補償和電壓迴轉率自動校正之2 倍VDD 輸出緩衝器未來規劃+63]
[參考文獻+65]

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