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博碩士論文 etd-0614114-135024 詳細資訊
Title page for etd-0614114-135024
論文名稱
Title
癌胚胎抗原讀取電路系統研製與具有漏電流感測器及讀取延遲補償之靜態隨機存取記憶體
Development of A Rapid Readout System for CEA Detection and An SRAM with Leakage Sensor and Read Delay Compensation
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
92
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2014-06-25
繳交日期
Date of Submission
2014-07-14
關鍵字
Keywords
靜態隨機存取記憶體、漏電流感測器、讀取電路
leakage current sensor, SRAM, readout circuit
統計
Statistics
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中文摘要
本論文內容分別針對生醫感測系統之電路技術與SRAM (static random access
memory, SRAM) 設計提出新方法。第一個主題為癌胚胎抗原(carcinoembryonic
antigen, CEA) 讀取電路系統及周邊電路研製,第二個主題為具有漏電流感測器及
讀取延遲補償之單靜態隨機存取記憶體。
第一個主題為癌胚胎抗原讀取電路系統研製,本論文以讀取電路系統,結合
彎曲平板波(flexural plate-wave, FPW) 生醫感測晶片,組成癌胚胎抗原濃度讀取
器。讀取電路系統包含直接頻率合成器、數位類比轉換器、訊號放大器以及峰值
偵測器。其利用彎曲平板波晶片因負載蛋白質濃度不同而有不同共振頻率偏移的
現象,藉由一掃頻訊號通過彎曲平板波生醫感測晶片時,讀取因訊號通過共振頻
率產生的最高電壓,並經由查表法回推待測之負載蛋白質濃度。本論文之癌胚
胎抗原讀取電路系統可在10 分鐘內得知檢測結果,其線性度與最大誤差分別為
0.9772 與0.662 %。
第二個主題探討一個具有漏電流感測器及讀取延遲補償之單端無擾5T 無負
載式4+1 kb 靜態隨機存取記憶體。此記憶體由控制電路、記憶體陣列、內建自我
測試電路、以及行、列解碼器所組成,而其中1 kb 記憶體陣列含漏電流偵測及讀
取延遲補償電路。漏電流偵測器以及補償電路由記憶體單元模型來模擬漏電流,
當記憶體單元模型的漏電流足以影響存取結果時,漏電流偵測電路會送出警告訊
號,並開啟補償機制,補償因漏電流造成的讀取延遲,以加快讀取速度並降低功
率消耗。本論文提出之記憶體每次存取消耗0.9411 pJ,讀取延遲減少35.58%。
Abstract
This thesis is composed of a biomedical sensing system design and a novel circuit
design of 5T SRAM (static random access memory, SRAM). The first topic is a CEA (carcinoembryonic
antigen, CEA) readout system development, while a static random access
memory with leakage sensor and read delay compensation is the second.
The first topic investigates a CEA measurement readout system. The core of this
system is the readout circuit. By taking advantage of the characteristics that the resonant
frequencies of the loaded FPW (flexural plate-wave, FPW) biosensor will shift, we can
detect the maximum voltage of the various sine wave signals fed into the biosensors when
the sine wave signal frequency meets the resonant frequency. The difference of the frequency
change, which also indicates the concentration of the biosensor, can be estimated
by a look-up table. The frequency shift of the biosensors can be readout in 10 minutes
by physical measurement to attain the linearity R2 of 0.9772, and the maximum error of
0.662 %.
In the second topic, a 4+1 kb SRAM with leakage sensor and read delay compensation
is demonstrated using 40 nm CMOS process, where single-ended 5T loadless SRAM cells are used. The energy per access is found to be 0.9411 pJ and the read delay is reduced 35.58% at the expense of 3.64% area overhead. The leakage sensor and compensation circuits are carried out by dummy SRAM cells to mimic the leakage currents therein. A warning signal will be sent and activates the compensation circuit to speed up the read access and lower the power consumption when the dummy SRAM cells are threatened by leakage currents.
目次 Table of Contents
Contents
Chinese Recommendation Letter . . . . . . . . . . . . . . . . . . . . . . . . . . . i
English Recommendation Letter . . . . . . . . . . . . . . . . . . . . . . . . . . . ii
Acknowledgements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
Abstract in Chinese . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
Abstract in English . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Introduction and Motivation . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.1 Medical Device Industry and CEA Tumor Marker Detection . . . 1
1.1.2 SRAM and Leakage Currents . . . . . . . . . . . . . . . . . . . 5
1.2 Related Prior Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.2.1 Readout Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.2.2 SRAMs with Leakage Compensation . . . . . . . . . . . . . . . 14
1.3 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2 CEA Readout System Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.1 Principle of CEA Readout Systems . . . . . . . . . . . . . . . . . . . . . 18
2.2 Architecture of CEA Readout Circuit . . . . . . . . . . . . . . . . . . . . 18
2.3 Readout Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.1 Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.2 Direct Digital Frequency Synthesis (DDFS) . . . . . . . . . . . . 22
2.3.3 Digital to Analog Converter (DAC) . . . . . . . . . . . . . . . . 23
2.3.4 Operational Amplifier . . . . . . . . . . . . . . . . . . . . . . . 24
2.3.5 Peak Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.4 Layout and Post-layout Simulations . . . . . . . . . . . . . . . . . . . . 29
2.5 Implementations and Measurements . . . . . . . . . . . . . . . . . . . . 32
2.5.1 Performance comparison . . . . . . . . . . . . . . . . . . . . . . 41
2.6 Summary and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3 An SRAM with Leakage Sensor and Read Delay Compensation . . . . . . . . 44
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.2 Architecture of 5T SRAM with Leakage Sensor and Read Delay Compensation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.3 Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.3.1 Single-ended Disturb-free 5T Loadless SRAM Cell . . . . . . . . 47
3.3.2 Row/Column decoder . . . . . . . . . . . . . . . . . . . . . . . 49
3.3.3 Build-in Self-test (BIST) . . . . . . . . . . . . . . . . . . . . . . 49
3.3.4 Leakage Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.3.5 Read Delay Compensation . . . . . . . . . . . . . . . . . . . . . 54
3.4 Layout and Post-layout Simulations . . . . . . . . . . . . . . . . . . . . 54
3.5 Implementations and Measurements . . . . . . . . . . . . . . . . . . . . 61
3.5.1 Performance comparison . . . . . . . . . . . . . . . . . . . . . . 66
3.6 Summary and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . 68
4 Conclusions and Future Works . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.1 Development of a Rapid Readout System for CEA Tumor Marker Detection 69
4.2 An SRAM with Leakage Sensor and Read Delay Compensation . . . . . 71
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
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