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博碩士論文 etd-0614114-155610 詳細資訊
Title page for etd-0614114-155610
論文名稱
Title
應用於頻移讀取系統之十位元製程補償電流驅動式數位類比轉換器與高輸入頻寬、高轉換增益功率偵測器
A 10-bit Process-Calibrated Current-Steering D/A Converter and High Bandwidth and High Coversion Gain Power Detector for Frequency-Shift Readout Systems
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
93
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2014-06-25
繳交日期
Date of Submission
2014-07-14
關鍵字
Keywords
製程補償、電流驅動式、數位類比轉換器、功率偵測器
current-steering, process-calibrated, DAC, power detector
統計
Statistics
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中文摘要
由於部分微機電系統(Microelectromechanical Systems, MEMS) 感測器之共振
頻率,因為抗體與抗原結合而改變的特性,因此常被使用來進行快篩檢測,如利
用彎曲平板波元件(Flexural Plate Wave, FPW) 來進行過敏原檢測、癌抗原檢測...
等。本論文包含了兩個這一類頻移感測系統之關鍵技術:十位元製程補償電流驅
動式數位類比轉換器,以及高輸入頻寬、高轉換增益之功率偵測器。
前述頻移讀取系統中,因為需要驅動感測器,因而數位類比轉換器為不可或
缺。本論文提出十位元製程補償電流驅動式數位類比轉換器,其中加入一組製程
感測電路,以感測不同製程角落,其輸出一數位碼,給予電流補償電路,使得數
位類比轉換器輸出電壓達到理想電位。另外則以延遲電路,關掉多餘電流,以節
省功率。由於具有製程補償校正,使得數位類比轉換器之靜態效能提升。此外,
製程校正電路亦減少數位類比轉換器之複雜度與面積,並且校正後在量測結果最
大微分非線性誤差(Differential Nonlinearity, DNL) 為0.18 LSB,最大積分非線性誤
差(Integral Nonlinearity, INL) 為0.32 LSB。
本論文另一技術為一高輸入頻寬、高轉換增益之功率偵測器,主要係以兩組
共源級組態放大器組成,搭配後端峰值偵測器或峰谷偵測器來讀取掃頻訊號時間
位置。此外,此功率偵測器擁有高輸入頻寬,其工作頻率為0.1 GHz ∼ 16 GHz,
且轉換增益為264 mV/dB,因此可提升頻移讀取電路之精確度與讀取頻率範圍。
Abstract
Since the combination of antigens with the corresponding antibody will change the
resonant frequency of certain MEMS sensors, this kind of technology is often utilized for
a rapid screen test, e.g., allergy testing, Carcinoembryonic Antigen (CEA) and Alphafetoprotein
(AFP) cancer marker detection using flexural plate wave (FPW) devices. The
thesis consists of two important designs for the mentioned frequency-shifting sensoring
systems, i.e., a 10-bit process-calibrated current-steering DAC and high bandwidth and
high coversion gain power detector.
A frequency-shift readout system needs to drive sensors such that DACs are indispensable.
The 10-bit process-calibrated current-steering DAC in this thesis utilizes a process
sensor to detect process corners and generate corresponding digital codes, which are
coupled to a current calibration circuit to compensate the output voltage. An auxiliary delay
circuit is employed in the current source to cut off the un-activated calibration current.
The maximum DNL and INL are measured to be 0.18 LSB and 0.32 LSB, respectively.
The other design of this thesis presents a high bandwidth and high coversion gain
power detector for the frequency-shift readout system. This design is basically composed
of two common source amplifiers, followed by a peak detector or a valley detector to
detect the presence of the resonant frequency. Besides, the range of frequency detection
is 0.1 GHz ∼ 16 GHz. The coversion gain is as high as 264 mV/dB such that the
power detector will enhance the accuracy and widen the operating frequency range of the
frequency-shift readout systems.
目次 Table of Contents
論文口試委員審定書. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
誌謝. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . II
論文摘要. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . III
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IV
目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
圖目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VIII
表目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XIV
1 概論. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 前言. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 研究動機. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2.1 AFP 與CEA 癌抗原快速生醫檢測系統. . . . . . . . . . . . . 3
1.2.2 寬輸入頻率範圍之頻移讀取電路. . . . . . . . . . . . . . . . 7
1.3 相關文獻與研究探討. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.3.1 十位元製程補償之電流驅動式數位類比轉換器. . . . . . . . 10
1.3.2 高輸入頻寬、高轉換增益之功率偵測器. . . . . . . . . . . . 14
1.4 論文大綱. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2 十位元製程補償電流驅動式數位類比轉換器. . . . . . . . . . . . . . . . . 18
V
2.1 簡介. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2 十位元製程補償電流驅動式數位類比轉換器架構. . . . . . . . . . . 20
2.3 十位元製程補償電流驅動式數位類比轉換器設計. . . . . . . . . . . 21
2.3.1 一位元數位類比轉換器. . . . . . . . . . . . . . . . . . . . . . 21
2.3.2 電流源陣列. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.3.3 單位電流源電路. . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.3.4 緩衝鎖存器. . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.3.5 製程感測電路. . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.3.6 製程補償電路. . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.4 電路模擬及預計規格. . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.4.1 DAC 之子電路模擬分析. . . . . . . . . . . . . . . . . . . . . 34
2.4.2 整體電路模擬分析. . . . . . . . . . . . . . . . . . . . . . . . 38
2.5 晶片佈局. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.6 晶片量測結果與分析. . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.6.1 晶片量測結果與分析. . . . . . . . . . . . . . . . . . . . . . . 43
2.6.2 量測結果與效能比較. . . . . . . . . . . . . . . . . . . . . . . 49
2.7 結果與討論. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3 高輸入頻寬、高轉換增益功率偵測器. . . . . . . . . . . . . . . . . . . . . 51
3.1 簡介. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
VI
3.2 高輸入頻寬、高轉換增益功率偵測器架構. . . . . . . . . . . . . . . 52
3.3 高輸入頻寬、高轉換增益功率偵測器設計. . . . . . . . . . . . . . . 54
3.3.1 功率偵測器. . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.3.2 峰值偵測器. . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.3.3 峰谷偵測器. . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.3.4 帶隙偏壓電路. . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.3.5 FBAR 與FPW 等效模型. . . . . . . . . . . . . . . . . . . . . 60
3.4 電路模擬及預計規格. . . . . . . . . . . . . . . . . . . . . . . . . . . 62
3.5 晶片佈局. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3.6 結果與討論. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
4 結論與未來工作. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.1 製程補償數位類比轉換器之結論與未來規劃. . . . . . . . . . . . . . 70
4.2 高輸入頻寬、高轉換增益功率偵測器之結論與未來規劃. . . . . . . 72
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