第一部份：
進行類神經關連性記憶體中所需要的雙極性內積乘法器中運算方式化簡，使其可以減少運算過程的時間與延遲時間。
第二部分：
設計一個八位元hard macro ADC IP並且可使類比數位轉換器在八個週期內即可找出類比值相對應之數位值。
第三部分：
實際製作智慧型電池的測試板並推導出電池存量運算方式，以FPGA模擬完成整體運算方式，使其可以計算手機電池的剩餘時間。

This thesis is composed of three independent parts, which are respectively focused on three different applications.
1. A Circuit Design of Fast Bipolar Inner Product Processor for Neural Associative Memory Networks：
A novel and high-speed realization of the bipolar-valued inner product processor for associative memory networks is presented. The proposed design is verified to speed up the inner product computation compared with prior works.
2. An Area-Saving 8-bit A/D Converter Using A Binary Search Scheme：
A fast and area-saving analog-to-digital converter using DFFs and a digital-to-analog converter is proposed. This design provides a reasonably fast solution for the embedded ADC with the area penalty growing linearly with the data length.
3. A Smart Battery Monitor Emulator System：
An efficient smart battery monitor emulator system is designed by using the bq2018 IC of Benchmarq company. This system is aimed to improve the battery monitoring efficiency such that the exact remaining power and time of the battery can be estimated.

第一章 簡介
1.1 前言
1.2 相關研究討論
1.3 論文目的
1.4 論文大綱
第二章 可用於類神經關聯性記憶體之快速雙極性數值內積乘法器
2.1 研究動機
2.2 設計原理
2.3 整體架構介紹
2.3.1 個別內積項產生器
2.3.2 (2 n -1)-to-n 的compressor 單元
2.3.3 雙極性數值至有號數二元值轉換單元
2.3.4 調整單元
2.3.5 整體設計
2.4 與其他類型類比數位轉換器比較
2.4.1 面積分析
2.4.2 延遲分析
2.5 晶片設計考量與規格
2.5.1 晶片腳位與操作說明
2.5.2 晶片佈局方式
2.5.3 測試考量
2.6 電路模擬
2.7 晶片佈局圖
第三章 二元搜尋式之小面積八位元類比數位轉換器
3.1 研究動機
3.2 架構與設計原理
3.2.1 設計原理與方法
3.2.2 電路架構
3.2.3 動作流程
3.3 晶片設計考量與規格
3.4 與其他類型類比數位轉換器比較
3.4.1 理論分析比較
3.4.1 面積與功率比較
3.5 電路模擬與測試
3.5.1 佈局前模擬
3.5.2 晶片測試
第四章 智慧型電池存量監視系統
4.1 簡介
4.2 智慧型電池監視器(bq2018)相關資料
4.2.1 bq2018 特性簡介
4.2.2 bq2018 內部規格
4.2.3 bq2018 測試板設計
4.3 電池存量監視模擬系統
4.3.1 電池存量監視系統簡介
4.3.2 FPGA_1 與bq2018 測試板間的電路
4.3.3 FPGA_2 運算過程
4.3.4 整體電池存量模擬系統
第五章 結論
參考文獻

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