同調接收技術(Coherent Detection)應用於光纖通訊已經受到世界關注，此種接收技術概念源自於無線電技術，有了此種技術應用於光纖通訊上，可以使光載波能被更有效率的使用，進而實現高頻譜效率的傳輸系統。1980年代時，為了要實現零差檢測(Homodyne Detection)，必須使用所謂光鎖相迴路(Optical Phase Locked Loop)，然而這種迴路至今仍難以實現。近年來人們使用數位信號處理取代光鎖相迴路藉以實現零差檢測，此方法要比光所像迴路較容易實現。
數位信號處理要實時(real time)得運作現今仍是一個難題，由於高速通訊系統的資料量龐大，要實時對如此龐大的訊號作運算需要強大運算效能的工具，現有的方式為利用現場可編程邏輯陣列（FPGA）來實現。從商用的角度來看，此種晶片所需要的成本過於昂貴。
這個碩士論文計畫利用一般的個人電腦(PC)搭載高效能圖形處理器運算卡作為數位信號處理的裝置，我們已完成這個利用圖形處理器平行處理的程式，這個程式的效能經優化後也足夠直接用在實時處理。這篇論文也將從軟體以及硬體的角度介紹CUDA，也說明同調接收器相位處理的演算法並且利用程式原始碼用解釋程式優化的關鍵技巧。

The coherent optical communication system has been paid much attention in the world. The fundamental idea came from the radio technology. With this technique applied to optical communication, we can make more efficient use of the light carrier. Furthermore, we can realize a high efficiency communication system. In 1980s, in order to realize homodyne detection, optical phase locked loop (OPLL) is needed. Unfortunately, it is still difficult to realize even nowadays.
Recently, people use digital signal processing in place of OPLL to realize homodyne detection coherent receiver. It is more feasible than OPLL.
The implementation of real-time DSP is still an issue due to the large amount of high-speed communication data. A powerful computing tool is needed for large amount data. Nowadays people utilize Field-Programmable Gate Arrays (FPGA), but it is still too expensive for commercial communication system.
This thesis tends to utilize a general personal computer which equipped with high-performance Graphic Processing Unit card for digital signal processing. We had completed the program and the performance is good enough for real-time processing. This thesis introduced the CUDA technology in the viewpoint of software and hardware, the algorithm is also introduced accompanied with source code to explain coding skills for optimizing the program.

英文論文審定書 i
中文論文審定書 ii
致謝 iii
Abstract iv
中文摘要 vi
圖次 viii
表次 x
Chapter 1 Introduction 1
1.1 Coherent System 1
1.2 Motivation and research method 4
1.3 Previous Achievements 6
1.4 Structure of this Thesis 9
Chapter 2 Graphic Processing Unit 10
2.1 Introduction 10
2.2 CUDA Parallel Computing 13
2.2.1 Software 13
2.2.2 Hardware 14
2.2.3 Processing Flow 16
2.3 Summary 17
Chapter 3 GPU Program & Algorithm 18
3.1 Introduction 18
3.2 Initialization 19
3.3 Algorithm & Source Code 20
3.4 BER Measurement 28
3.5 Program Optimization 31
3.6 Result 37
Chapter 4 Preparation for Real-Time Mode 40
4.1. Introduction 40
4.2. ADC/DAC 41
4.3. Asynchronous Execution 44
Chapter 5 Summary 47
References 48

1. Dany-Sebastien Ly-Gagnon, Tsukamato, Kazuhiro Katoh, and Kazuro Kikuchi, “ Coherent detection of optical quadrature phase-shift keying signals with carrierphase estimation “, journal of lightwave technology,Vol. 24, NO. 1, page 12-21,
Jan. 2006
2. Jens C. Rasmussen, Takeshi Hoshida, Hisao Nakashima, “Digital CoherentReceiver Technology for 100-Gb/s Optical Transport Systems”, FUJITSU Sci.Tech. J., Vol. 46, No. 1, pp. 63-71, January 2010
3. Hsiang-Hung Hsiao, “GPU Based Digital Coherent Receiver for Opticaltransmission system”, Department of Photonics, National Sun Yat-sen University,June, 2012
4. Govind P. Agrawal,”Fiber-Optic Communication Systems”, Edition: 3, Chapter10,June 15, 2002 ,John Wiley & Sons, Inc.
5. Akshay Shukla,”Simulation on programmable graphics hardware (GPUs)”,04/08/2010, http://run.usc.edu/cs599-s10/scribeNotes/Akshay_Shukla_scribe_notes.pdf
6. Yukai Hung,”CUDA Asynchronous Memory Usage and Execution”, Department ofMathematics National Taiwan University
7. NVidia Company, “NVIDIA CUDA C Programming Guide”, Edition 4.2, April2012
8. NVidia Company, “CUDA C BEST PRACTICES GUIDE”, Edition 4.1, January2012
9. NVidia Company, “Whitepaper: NVIDIA’s Next Generation CUDA ComputeArchitecture: Fermi”, Edition 1.1,2009
10. NVidia Company, “Whitepaper: NVIDIA’s Next Generation CUDA ComputeArchitecture: Kepler TM GK110”, Edition 1.0,2012
11. Arnaud Maye, 4DSP,”FMC110 reference application source code: main.cpp”