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博碩士論文 etd-0624102-185223 詳細資訊
Title page for etd-0624102-185223
論文名稱
Title
匯流排資料寬度轉換之先進先出記憶體與數位無線耳機基頻控制器之類比前端介面
An FIFO Memory Design for Data Exchange Bus and Analog Front-end of Digital Cordless Headset Baseband Controller
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
69
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2002-06-12
繳交日期
Date of Submission
2002-06-24
關鍵字
Keywords
直流電壓轉換器、類比前端、先進先出記憶體
DC-DC converter, analog front-end, FIFO memory
統計
Statistics
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The thesis/dissertation has been browsed 5665 times, has been downloaded 0 times.
中文摘要
本論文共涵蓋三個不同的主題:第一部份為匯流排資料寬度轉換之先進先出記憶體的實作,我們提出一個FIFO記憶體的架構能使用於兩個不同資料寬度的裝置間,不需要仲裁模組去決定輸出或輸入的順序,因此延遲可以大為減少。

第二部份為數位無線耳機基頻控制器之類比前端介面的實作,此類比數位介面整合IC,主要的功能就是提供數位資訊與類比訊號的溝通界面,將類比訊號轉換成8位元數位訊號後再由後端控制器進一步的處理,並且可以將8位元的數位語音資訊轉換成為類比的聲音資訊,並內建含致能訊號的震盪器。

第三部份為內建電壓偵測之直流電壓轉換器的實作,此電路能夠將1.5V的直流電壓轉為2.7V輸出。因此一個系統靠著這個電路可以只用一顆乾電池便可啟動,電路內部同時內建一個電壓偵測器能指出目前輸出電壓的情形。


Abstract
Three different chip design topics associated with their respective applications are proposed in this thesis. The first topic is the implementation of an FIFO memory design for 8-to-32 data exchange bus. An FIFO memory architecture is proposed to be utilized in data exchange between processing units which possess non-homogeneous bus widths. Neither arbiter logics nor modules are required in such a design to determine input sequences or output sequences. Hence, the delay is drastically shortened.

The second topic is focused on the implementation of an analog front-end of digital cordless headset baseband controller. The integrated analog and digital interface IC provides an interface for analog and digital communication. It converts an analog signal into an 8-bit digital signal, which will be processed by the baseband controller. It also converts an 8-bit digital voice data into an analog voice signal. In addition, a built-in oscillator is included in the design, which provides a global clock signal.

The third topic is to carry out an DC/DC converter with a built-in voltage detector. The converter can convert 1.5V input voltage to 2.7V output voltage. A portable system can use only one single battery to power on by this circuit. It also contains a voltage detector to indicate whether the output voltage meets the pre-determined level.


目次 Table of Contents
摘要 i
Abstract ii
第一章 簡介 1
1.1論文動機與目的 1
1.2相關研究討論 2
1.3論文大綱 4
第二章 匯流排資料寬度轉換之先進先出記憶體 5
2.1簡介 5
2.2研究動機 5
2.3架構原理與電路設計 9
2.3.1 8-to-32 FIFO記憶體架構 9
2.3.2 32-to-8 FIFO記憶體架構 13
2.4效能分析 14
2.5效能模擬與晶片佈局 15
2.5.1 8-to-32 FIFO 晶片實現 16
2.6結論 20
第三章 數位無線耳機基頻控制器之類比前端介面 21
3.1簡介 21
3.2研究動機 21
3.3系統雛型驗證 22
3.4架構原理與電路設計 25
3.4.1 設計原理與方法 25
3.4.2 電路架構 26
3.4.3 4-channel ADC 27
3.4.4 8-bit DAC 29
3.4.5 Oscillator 32
3.5模擬結果 33
3.5.1 4-channel ADC 33
3.5.2 8-bit DAC 35
3.5.3 Oscillator 35
3.6佈局 36
3.7測試結果 39
3.7.1 4-channel ADC 39
3.7.2 8-bit DAC 41
3.7.3 Oscillator 42
3.7.4 量測結果 44
3.8結論 45
第四章 內建電壓偵測之直流電壓轉換器 47
4.1簡介 47
4.2研究動機 47
4.3架構原理與電路設計 48
4.4模擬結果與晶片佈局 51
4.4.1 模擬結果 51
4.4.2 晶片實現 52
4.5測試結果 55
4.6結論 58
第五章 結論 59
參考文獻 60
附錄 63
參考文獻 References
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[16] M. Gustavsson, J. J. Wikner, and N. N. Tan, “CMOS Data Converters for Communications,” Reading: Kluwer Academic Publishers, 2000.
[17] D. A. Johns, K. Martin, “Analog Integrated Circuit Design,” Reading: John Wiley and Sons. Inc., 1997.
[18] J. Hsieh, “Nyquist-Rate A/D Converter Design,” Reading: National Science Council Chip Implementation Center, Oct. 2001.
[19] J.G. Kassakian, M. F. Schlecht, G. C. Verghese, “Principles of Power Electronics,” Reading: Addison-Wesley Publishing Company, Inc., 1991.
[20] R. W. Erickson, “DC-DC Power Converters,” Web Site:http://schof.colorado.edu/~ecen4517/course_material/material.html.
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[22] Holtek Semiconductor, Inc., “DC/DC Converter with Built-in Voltage Detector”, Reading: Data Sheet, 2000.
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