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博碩士論文 etd-0624113-153541 詳細資訊
Title page for etd-0624113-153541
論文名稱
Title
晶片間傳輸的對準與表現的統計分析
Statistical Analysis of Alignment and Performance for Chip-to-Chip Communication
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
61
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2013-07-08
繳交日期
Date of Submission
2013-07-26
關鍵字
Keywords
函數型資料分析、噪音訊號比、差分訊號、散射參數、混合模態散射參數
SNR, S-parameter, mixed mode S-parameter, functional data analysis, differential signaling
統計
Statistics
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中文摘要
本論文旨在探討 3D 晶片整合系統中利用電容耦合晶片至晶片的傳輸信號以達到設計與封裝的複雜性在功耗和性能之間的權衡
。將晶片鄰近放置在一起可使其消耗的能量降低並同時提高 I/O 密度,因此提供 off-chip 頻寬水平遠比傳統封裝的 I/O 技術重要。先前與電容耦合 I/O 相關的論文大部分都集中在探討使用機械方法來使晶片校準。而在本論文中,
我們將探討一些獨特的 I/O 系統設計。我們將焊墊(pad)依不同擺放位置、pad 間之間距、不同差分訊號之配置、及不同頻率之下訊號的品質去做分析。我們以 HFSS 軟體模擬不同 pad 擺置狀況下之間的訊號,使用函數型資料分析方法分析噪音訊號比(signal-to-noise-ratio; SNR)。
本研究的主旨在探討得到最佳訊號品質的配置方式。
Abstract
Using capacitive coupling chip-to-chip signaling in 3D integration system offers an interesting tradeoff between design and packaging complexity versus power consumption and performance. Placing chips together in close proximity offers low energy per-bit costs and high I/O density, and therefore enables off-chip bandwidth levels far beyond those offered by traditional packaging and I/O technologies. Much of the previous published work on capacitive proximity I/O has focused on mechanical methods for accurate chip alignment. In this thesis we discuss some system design considerations unique to proximity I/O.
We analyze the signal quality when the pads are at different placement configurations for differential signal pair arrangement under various high frequency operations. The S parameters are obtained based on HFSS simulation tool.
The behaviors of the signal to noise ratio at different placement configuration is analyzed using functional data analysis. The objective of this study is to find the optimal pad placement for chip to chip communication.
目次 Table of Contents
誌謝 i
摘要 ii
Abstract iii
1 緒論 1
1.1 研究動機 1
1.2 資料生成法 1
2 散射參數分析簡介(S-parameter) 3
2.1 差分訊號傳輸簡介(Differential Signal) 3
2.2 散射參數(S-parameter)及噪音訊號比(Singal To Noise Ratio) 3
2.3 混合模態散射參數(Mixed Mode S-Parameter) 5
3 函數型資料分析(Functional Data Analysis) 7
3.1 前言 7
3.2 函數型資料分析簡介 7
3.3 基函數模型 8
3.4 Spline 函數 9
3.4.1 Spline 函數介紹 9
3.4.2 B-Splines 函數 10
3.5 基函數配適與函數平滑性的度量 10
3.5.1 基函數配適 10
3.5.2 函數平滑性的度量(Roughness Penalty) 10
3.6 函數型線性模型 12
4 Wave Port 模擬分析 15
4.1 模擬說明 15
4.1.1 Wave Port Side Differential 模擬設定 15
4.1.2 Wave Port Corner Differential 模擬設定 15
4.2 Wave Port 統計分析 16
5 Lump Port 模擬分析 21
5.1 Lump Port 模擬設定 21
5.2 Lump Port Differential 分析說明 21
5.1.1 Lump Port Side Differential 分析說明 21
5.1.2 Lump Port Corner Differential 分析說明 22
5.3 Lump Port 統計分析 23
6 結論與建議 27
參考文獻 28
附錄 30
參考文獻 References
[1]D. Edenfeld, A. B. Kahng, M. Rodgers, and Y. Zorian, "Technology roadmap for semiconductors," Computer, vol. 37, no. 1, pp. 47-56, 2004.
[2]R. Drost, R. Hopkins, R. Ho, and I. Sutherland, "Proximity communication," IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1529–1535,
Sep. 2004.
[3]P. Leduc, "What is 3d ic integration and what metrology is needed," in Conference on Frontiers of Characterization and Metrology for Nanoelectronics, Mar. 2007.
[4]B. Krenik, D. Buss, and P. Rickert, "Choose the best IC integration method when designing a 3G handset," 2005
http://www.eetimes.com/document.asp?doc_id=1272092,造訪日期:2013.07.18
[5]R. Canegallo, A. Fazzi, L. Ciccarelli, L. Magagni, F. Natali, P. Rolandi, E. Jung, L. D. Cioccio, and R. Guerrieri, "3D Capacitive Interconnections for High Speed Interchip Communication," IEEE 2007 Custom Intergrated Circuits Conference (CICC), pp. 2-1-1~2-1-8
[6]黃志億 (2007),"IC 封裝基板上差動對繞線設計之研究",國立中山大學碩士論文。
[7]T. Hamano and Y. Ikemoto, "Electrical characterization of a 500 MHz frequency EBGA package," IEEE Trans. Advanced Packaging, vol. 24, pp. 534-541, Nov. 2001.
[8]N. Kim, M. Sung, H. Kim, S. Baek, W. Ryu, J. G. An, and J. Kim, "Reduction of crosstalk noise in modular jack for high-speed differential signal interconnection," IEEE Trans. Advanced Packaging, vol. 24, pp. 260-267, Aug. 2001.
[9]H. Shi, V. Echevarria, W. T. Beyene, and X. C. Yuan, "EMI evaluation of a differential signaling interconnect at 3.2 Gbps," in Proc. 14th IEEE Electrical Performance of Electronic Packaging Conf., 2005, pp. 65-68.
[10]D. G. Kam, H. Lee, S. Baek, B. Park, and J. Kim, "Enhanced immunity against crosstalk and EMI using GHz twisted differential line structure on PCB," in IEEE Electromagnetic Compatibility Symp. Dig., 2002, pp. 643-647.
[11]D. G. Kam, H. Lee, J. Kim, and J. Kim, "A new twisted differential line structure on high-speed printed circuit boards to enhance immunity to crosstalk and external noise," IEEE Letters, Microwave and Wireless Components, vol. 13, pp. 411-413, Sept, 2003.
[12]K. Vaz and M. Caggiano, "Measurement Technique for the Extraction of Differential S-Parameters from Single-ended S-Parameters," IEEE 27th International Spring Seminar on Electronics Technology, vol. 2, pp. 313-317, May, 2004.
[13]http://home.educities.edu.tw/oldfriend/SI_PI/s_parameter.htm,造訪日期:2013.07.18
[14]F. M. Pitschi, J. E. Kiwitt, K. C. Wagner, H. Bilzer, P. Schuh, and W. Menzel, "Combined differential and common mode scattering parameters-theory and simulation," in IEEE Ultrasonics Symp. Dig., 2003, pp. 401-406.
[15]A. Penkar and M. Caggiano, "Measurement and analysis of packages with differential signaling scheme," in Proc. 26th, Electronics Technology: Integrated Management of Electronic Materials Production International Spring Seminar, 2003, pp. 452-455.
[16]http://www.ieee802.org/3/ba/public/may09/dambrosia_01_0509.pdf,造訪日期:2013.07.18
[17]徐佳 (2008),"函數型數據分析及其在證券投資中的應用",浙江大學理學院碩士論文。
[18]J.O. Ramsay, G. Hooker, and S. Graves (2009), "Functional Data Analysis with R and MATLAB", New York: Springer.
[19]J.O. Ramsay and B.W. Silverman (2005), "Functional Data Analysis", Second Edition. New York: Springer.
[20] A. Chow, P. Amberg, M. Dayringer, H.F. Moghadam, R. Ho, D. Hopkins, J. Lexau, F. Liu, and J. Schauer, "System Considerations for Wireless Capacitive Chip-to-Chip Signaling", IEEE International Symposium on Radio Frequency Integration Technology, Beijing, China, pp. 41-44, Dec, 2011.
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