在本論文中，我們提出一個具有本體抬高式與雙嵌入氧化物之高速度且低成本非傳統單載子互補金氧半反相器(Unipolar CMOS)。單載子互補金氧半反相器之原理為利用負型金氧半(NMOS)負載去取代在傳統互補金氧半電路中的正型金氧半(PMOS)負載，此時電路中的傳輸載子都為電子，整體速度會大幅提升。在此非傳統互補式金氧半反相器中，負載端利用本體抬高式雙嵌入氧化物之NMOS去抑制反轉層電流，使得主要操作電流由貫穿電流所主導。
根據結果顯示，本論文所提出之非傳統單載子互補金氧半反相器在邏輯電路上均有正確的邏輯特性，在利用貫穿效應的機制下，傳遞延遲時間比傳統互補式金氧半反相器下降了41 %。我們同時延伸利用平帶電壓去取代臨限電壓，此時元件會操作在弱反轉區域，在抑制反轉層電流與漏電流上獲得大大的改善，所以在評量指標上比傳統互補金氧半反相器減少了44 %，達成超低節能之次臨界型單載子互補金氧半反相器。另外，在製程方面，由於驅動器與負載端皆為NMOS，所以可以免除N型井區的製程步驟。在規劃佈局之面積上因為有共享輸出，使得與傳統互補金氧半反相器比較可節省75 %面積，達成降低成本之目的。

In this thesis, we propose a high speed and low cost non-classical CMOS with elevated body and double-embedded oxide (EBDEO). This unipolar CMOS is composed of a NMOS driver and an EBDEO NMOS which replaces a PMOS as load. A high speed characteristic can be reached due to channel carriers are constituted by electrons only. Among them, the EBDEO scheme can suppress the inversion current, so the punch through current can be used as dominant current in the EBDEO NMOS load. According to the simulation results, the propagation delay time of the non-classical unipolar CMOS can reduce 41 % when compared with the conventional CMOS. In addition, the sub-threshold region unipolar CMOS can be formed by using the flat-band voltage to replace the threshold voltage. On the figure of merit (FOM), it can improve 44 % when compared with the conventional CMOS. Because of all NMOS devices are exploited, the N-well process can be eliminated. It also has share-terminal output, so the layout area can be reduced more than 75 %, as compared with the conventional CMOS.

第一章 緒論 1
1.1 背景 1
1.2 動機 3
第二章 貫穿效應之操作原理 5
2.1 貫穿效應 5
2.2 傳統互補式金氧半反相器之架構與操作原理 7
2.3 傳統互補式金氧半反相器之負載線 8
2.4 傳統互補式金氧半反相器之電壓與電流轉移特性曲線 9
2.5 具有本體抬高式雙嵌入氧化物之非傳統單載子傳輸操作原理 11
2.6 非傳統單載子傳輸之負載線 14
2.7 非傳統單載子傳輸之電壓與電流轉移特性曲線 16
2.8非傳統單載子傳輸之電流向量 17
第三章 元件架構設計與製程步驟 19
第四章 電性討論與分析 21
4.1 模擬使用之物理模型 21
4.2 元件模擬電性結果之分析與討論 22
4.2.1 具有本體抬高式雙嵌入氧化物負型金氧半負載之非傳統單極性互補金氧半反相器 22
4.3 數位邏輯電路模擬之應用 38
4.3.1 反或閘(NOR Gate) 38
4.3.2 反及閘(NAND Gate) 40
4.3.3 環形震盪器(Ring Oscillator) 42
4.3.4 全加器(Full adder) 43
4.4 傳遞延遲時間(Propagation delay time)與評量指標(FOM)之比較 44
4.5 具有本體抬高式雙嵌入氧化物負型金氧半負載單載子互補金氧半與傳統互補金氧半之面積比較 47
4.6 次臨界型之應用與探討 48
4.6.1 次臨界型單載子互補金氧半反相器 49
4.6.2 次臨界型數位邏輯電路模擬之應用 51
4.6.3 次臨界型傳遞延遲時間(Propagation delay time)與評量指標(FOM)之比較 53
4.6.4 次臨界型之VDD變化 56
4.7 實際量測結果 57
第五章 結論與未來展望 60
5.1結論 60
5.2 未來展望 61
參考文獻 62
附錄 67
A 汲極與源極空乏區寬度計算 67
B 閘極所控制之空乏區寬度 68
C 平帶電壓 70
D 功函數差 70
E 臨限電壓 71
F 模擬元件參數設定 71
附錄參考文獻 72
個人著作 73
共同著作 74

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