在本篇論文中，我們提出了一具有延伸本體之新型鰭式電晶體(Extended Body Fin Shape Field Effect Transistor, EB-FinFET)，並應用在單電晶體動態隨機存取記憶體(One Transistor Dynamic Random Access Memory, 1T-DRAM)。由於微縮會使得電荷儲存區的不足，本論文使用延伸本體的方式擴大儲存區域，並將其應用在具有高積集密度的鰭式電晶體。延伸本體區不僅能當作額外儲存區，更能使得自身架構穩固且可以減少角落效應並協助散熱。在本論文裡，會探討延伸本體的高度變化對元件特性之影響。在基本電性上，相對於傳統的鰭式電晶體，EB-FinFET會有37.5 %之驅動電流提升；在記憶體特性方面，不論使用撞擊游離機制或是閘極引致漏電流機制，與傳統的鰭式電晶體相比，可程式規劃窗(Programming Window, PW)分別有74.39 %和65.53 %的提升；資料保存時間(Data Retention Time, RT)也分別有3.88 %和7 %的延長；不僅如此，在高溫下，比起傳統FinFET之可程式規劃窗44.39 %的衰退，EB-FinFET只有27 %的衰退，可見其具有較好的溫度抵抗性。由以上延伸本體帶來的優點，EB-FinFET具有潛力且不失為一項極佳的解決方案。

In this paper, we propose a new extended body FinFET (EB-FinFET) for one transistor dynamic random access memory (1T-DRAM) application. As the device scales down, 1T-DRAM faces the challenge of an insufficient storage region. We use the extended body to enlarge the stored charge region and apply for the high integrated FinFET structure. Extended body region not only can be an additional stored region but also can make the structure firm, and even suppresses the corner effect to help to dissipate heat. We investigate how extended body height affects the electrical characteristics in the paper. In the basic electrical characteristic, EB-FinFET has a higher drain current and the increasing of the current is about 37.5 % which compared with conventional FinFET. In the part of the memory characteristics, whether the impact ionization (I.I.) or gate induced drain leakage (GIDL) mechanism, programing windows are improved about 74.39 % and 65.53 % which compared with conventional FinFET, respectively. Both those of data retention times are also improved about 3.88 % and 7 %, respectively. Besides, EB-FinFET shows great thermal immunity for programming window. Compared to 44.39 % degradation for FinFET, EB-FinFET degrades only 27 %. In terms of above-mentioned advantages of extended body, the proposed EB-FinFET can become a promising candidate for future memory application.

論文審定書………………………………………………………………………………i
英文論文審定書………………………………………………………………………...ii
致謝……………………………………………………………………………………..iii
摘要……………………………………………………………………………………..iv
Abstract………………………………..…………….…………………………………...v
第一章 導論 1
1.1 研究背景 1
1.2 論文回顧 4
1.3 動機 11
第二章 操作原理 12
2.1 物理機制探討 12
2.1.1 浮體效應(Floating Body Effect, FBE) 12
2.1.2 短通道效應(Short Channel Effect, SCE) 13
2.1.3 角落效應(Corner Effect)和自我加熱效應(Self-Heating Effect) 14
2.2 操作原理 15
2.2.1 撞擊游離機制 15
2.2.2 閘極引致汲極漏電流機制 16
2.2.3 寄生雙極性介面電晶讀取體機制 18
第三章 元件製作 21
3.1 模擬元件 21
3.2 元件實作 24
第四章 研究方法與結果討論 26
4.1 研究方法 26
4.2 電性探討 29
4.2.1 元件架構說明 29
4.2.2 輸入特性曲線 32
4.2.3 輸出特性曲線 35
4.3 記憶體特性探討 37
4.3.1 可程式規劃視窗 (Programming Window, PW) 37
4.3.2 資料保存時間 (Data Retention Time, RT) 50
4.3.3 撞擊游離機制與閘極引致漏電流機制的比較 53
4.3.4 微縮化探討 (Scalability) 59
4.3.5 元件容忍度 (Endurance) 61
4.3.6 干擾抵抗性 (Disturbance) 64
4.4 元件實作結果與量測 66
第五章 結論與未來展望 69
5.1 結論 69
5.2 未來展望 70
參考文獻 71
附錄 – 偏壓最佳化 77
論文著述 85
個人得獎 86

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