隨著科技的演進，記憶體的使用越來越頻繁，其重要性也越來越受到重視，電阻式記憶體(Resistance Random Access Memory)是現今學術界及業界主要研究的次世代非揮發性記憶體其中之一，對於RRAM的應用來說，元件穩定度和可靠度是必須克服的難題，因此本論文主要藉由材料改質和結構堆疊的方式使元件穩定並研究其機制。
隨著摩爾定律 (Moore’s Law) 微縮的發展，但終究會面臨物理極限，因此可藉由高儲存密度的記憶體，達到類似微縮的效果，從實驗室先前數據發現Pt/LiSiOx/TiN元件具有成為高儲存密度記憶體的潛力，但必須解決阻態的不穩定性和的隨機性，所以藉由在切換層摻雜石墨可以有效限制住鋰離子的移動並沉積氧化鋁為阻絲層，解決阻態不穩的問題。
電流隨著多次小於Reset電壓的電壓掃描而下降，因此掃描次數可決定RRAM的阻態，以及在極短時間的脈衝 (Pulse) 刺激元件也有相同的效果，並且在常溫和高溫下都保有很好的保存力 (Retention)；經由實驗驗證乙炔經過二氧化矽加熱催化成苯環的化學方程式作用於RRAM，所以元件有良好的耐操度 (Endurance)，根據載子傳導機制釐清原因並提出模型解釋。

With the advent of technology evolution, the needs of memory become more important. Resistance random access memory (RRAM) is one of the mainstream research topics in academia and industry to develop the next-generation non-volatile memory to replace flash memory. However, the resistance switching mechanism and conduction model of RRAM are still under debating and keep discussing so far. Meanwhile, the stability and uniformity issues also hinder RRAM real applications. Therefore, this thesis aims to improve stability of RRAM by use of doping and stacking method.
With development of Moore’s Law, it is unavoidable to face physical limitation. However, the high storage density memory can miniature dimension. Based on our previous research, a device of Pt/LiSiO2/TiN structure has potential of high storage density memory. However, it also has drawbacks of instability and uniformity of resistance distribution. To solve this instability problem, we doped graphene in the Al2O3 switching layer to limit the drift of Li+ ions.
Experimental results show that the conducting current declines with applying a voltage smaller than RESET voltage. Therefore, the number of DC scanning also decides the resistance of RRAM device. In addition, this phenomenon has been further confirmed by AC operations. Data retention experiment with high and room temperature shows excellent capability to store data. The experimental result shows that the ethyne would react with silicon dioxide and form benzene at high temperature, which is beneficial to produce better endurance in RRAM. We proposed a conducting mechanism based on the carrier fitting results.

論文審定書 i
中文摘要 iii
Abstract iv
目錄 v
圖目錄 xi
表目錄 xv
第一章 緒論 1
1-1前言 1
1-2研究目的與動機 2
第二章 文獻回顧 4
2-1次世代非揮發性記憶體 4
2-1-1 鐵電式記憶體 (FeRAM) 4
2-1-2 磁阻式記憶體(MRAM) 5
2-1-3 相變化記憶體(PCRAM) 6
2-1-4 電阻式記憶體(RRAM) 7
2-2電阻式記憶體切換機制 8
2-2-1 阻絲理論(Filament Theory) 8
2-3絕緣體載子傳導機制 11
2-3-1 歐姆傳導 (Ohmic Conduction) 12
2-3-2 蕭基發射 (Schottky Emission) 13
2-3-3 普爾-法蘭克發射 ( Poole-Frenkel Emission) 14
2-3-4 跳躍傳導 (Hopping Conduction) 15
2-3-5 穿隧 (Tunneling) 16
2-3-6 空間電荷限制電流 (Space Charge Limited Current，SCLC) 17
第三章 實驗設備介紹 18
3-1製程設備 18
3-1-1 多靶磁控濺鍍系統 (Multi-Target Sputter) 18
3-2材料分析設備 19
3-2-1 傅立葉轉換紅外光譜儀 (Fourier-Transform Infrared Spectrometer) 19
3-2-2 X光電子能譜 (XPS) 21
3-2-3 N&K薄膜特性分析儀 (N & K Analyzer) 22
3-3電性量測設備 23
3-3-1 半導體精準電性量測系統 23
第四章 Pt/LiSiOx/TiN與Pt/LiSiOx:C/TiN以及Pt/Al2O3/LiSiOx:C/TiN電阻式記憶體之特性研究及比較 25
4-1實驗動機 25
4-2 Pt/LiSiOx:C/TiN元件電阻式記憶體製備流程 28
4-2-1 Pt/LiSiOx:C/TiN元件製備流程 28
4-2-2 LiSiOx:C薄膜製備 30
4-2-3 Pt上電極製備 30
4-3 LiSiOx:C薄膜材料分析 31
4-3-1 XPS化學定量分析 31
4-4 Pt/LiSiOx:C/TiN元件電性分析比較 32
4-4-1 Pt/LiSiOx:C/TiN元件I-V基本特性 32
4-4-2 Pt/LiSiOx:C/TiN元件載子傳導機制 34
4-4-3 Pt/LiSiOx:C/TiN元件記憶保存力 (Retention) 35
4-4-4 Pt/LiSiOx:C/TiN元件耐操度測試 36
4-5 Pt/LiSiOx/TiN和Pt/LiSiOx:C/TiN元件電性特性之比較 37
4-5-1 Pt/LiSiOx/TiN和Pt/LiSiOx:C/TiN元件操作穩定度之比較 37
4-5-2 Pt/LiSiOx/TiN和Pt/LiSiOx:C/TiN元件操作穩定度之比較 39
4-5-3 Pt/LiSiOx/TiN和Pt/LiSiOx:C/TiN元件載子傳導機制之比較 39
4-6 Pt/LiSiOx/TiN和Pt/LiSiOx:C/TiN元件載子傳導物理機制模型之比較 40
4-6-1 Pt/LiSiOx/TiN元件載子傳導物理機制之模型 40
4-6-2 Pt/LiSiOx:C/TiN元件載子傳導物理機制之模型 41
4-7 Pt/Al2O3/LiSiOx:C/TiN元件電阻式記憶體製備流程 42
4-7-1 Pt/Al2O3/LiSiOx:C/TiN元件製備流程 42
4-7-2 LiSiOx:C薄膜製備 43
4-7-3 Al2O3薄膜製備 44
4-7-4 Pt上電極備製 45
4-8 Pt/Al2O3/LiSiOx:C/TiN元件電性分析比較 45
4-8-1 Pt/Al2O3/LiSiOx:C/TiN元件I-V基本特性 45
4-8-2 Pt/Al2O3/LiSiOx:C/TiN元件載子傳導機制 47
4-9 Pt/LiSiOx:C/TiN和Pt/ Al2O3/LiSiOx:C /TiN元件電性特性之比較 48
4-9-1 Pt/LiSiOx:C/TiN及Pt/Al2O3/LiSiOx:C/TiN元件操作穩定度之比較 48
4-9-2 Pt/LiSiOx:C/TiN及Pt/Al2O3/LiSiOx:C/TiN元件載子傳導機制之比較 49
4-9-3 Pt/LiSiOx:C/TiN和Pt/Al2O3/LiSiOx:C/TiN元件載子傳導物理機制模型之比較 49
第五章 Pt/Al2O3/LiSiOx:C/TiN元件電阻式記憶體多階式阻態特性研究及比較 51
5-1電阻式記憶體固定截止電壓掃描 51
5-1-1 Pt/Al2O3/LiSiOx:C/TiN 元件固定截止電壓掃描 51
5-1-2 Pt/HfOx/TiN 元件固定截止電壓掃描 52
5-1-3 Pt/HfOx/TiN和Pt/Al2O3/LiSiOx:C/TiN 元件固定截止電壓掃描比較 53
5-1-4 Pt/Al2O3/LiSiOx:C/TiN元件載子傳導機制 54
5-1-5 Pt/Al2O3/LiSiOx:C/TiN 元件用Pulse Reset組態 56
5-1-6 Pt/Al2O3/LiSiOx:C/TiN 元件多階阻態記憶保存力 57
5-1-7 Pt/Al2O3/LiSiOx:C/TiN 元件載子傳導物理機制之模型 60
第六章 耐操度之探討 62
6-1實驗動機 62
6-1-1 Pt/ Al2O3/TiN元件電性分析 62
6-2 Pt/Al2O3/SiO2:C/TiN元件製備流程 63
6-2-1 Pt/ Al2O3/SiO2:C/TiN元件製備流程 63
6-2-2 SiO2:C薄膜製備 64
6-2-3 Al2O3薄膜製備 65
6-2-4 Pt上電極製備 66
6-3 SiO2:C薄膜材料分析 66
6-3-1 XPS化學定量分析 66
6-4 Pt/Al2O3/SiO2:C/TiN元件電性分析比較 67
6-4-1 Pt/Al2O3/SiO2:C/TiN元件I-V基本特性 67
6-4-2 Pt/Al2O3/SiO2:C/TiN元件載子傳導機制 69
6-4-3 Pt/Al2O3/SiO2:C/TiN元件耐操度測試 69
6-5 Pt/Al2O3/TiN和Pt/Al2O3/SiO2:C/TiN元件載子傳導物理機制模型之比較 70
6-5-1 Pt/Al2O3/TiN和Pt/Al2O3/SiO2:C/TiN元件載子傳導機制之比較 70
6-5-2 Pt/Al2O3/TiN和Pt/Al2O3/SiO2:C/TiN元件耐操度之比較 71
6-5-3 Pt/Al2O3/SiO2:C/TiN元件載子傳導物理機制之模型 72
6-6實驗動機 73
6-7 Pt/Al2O3/ Al2O3:C/TiN元件製備流程 73
6-7-1 Pt/ Al2O3/ Al2O3:C/TiN元件製備流程 73
6-7-2 Al2O3:C薄膜製備 74
6-7-3 Al2O3薄膜製備 75
6-7-4 Pt上電極製備 76
6-7-5 XPS化學定量分析 76
6-8 Pt/Al2O3/Al2O3:C/TiN元件電性分析 77
6-8-1 Pt/Al2O3/ Al2O3:C /TiN元件I-V基本特性 77
6-8-2 Pt/Al2O3/ Al2O3:C /TiN元件載子傳導機制 79
6-8-3 Pt/Al2O3/ Al2O3:C/TiN元件耐操度之測試 80
6-8-4 Pt/Al2O3/ Al2O3:C /TiN元件載子傳導物理模型 81
6-9 Pt/Al2O3/Al2O3:C/TiN與Pt/Al2O3/ SiO2:C /TiN元件電性特性及物理機制模型之比較 82
6-9-1 Pt/Al2O3/ Al2O3:C /TiN與Pt/Al2O3/ SiO2:C /TiN元件 Forming 後Read之比較 82
6-9-2 Pt/Al2O3/ Al2O3:C /TiN與Pt/Al2O3/ SiO2:C /TiN元件耐操度之比較 83
6-9-3 Pt/Al2O3/ Al2O3:C /TiN與Pt/Al2O3/ SiO2:C /TiN元件載子傳導物理機制之比較 84
6-9-4 Pt/Al2O3/ Al2O3:C /TiN與Pt/Al2O3/ SiO2:C /TiN元件載子傳導物理機制模型之比較 85
第七章 結論 86
參考文獻 87

[1] D. A. Buck, "Ferroelectrics for Digital Information Storage and Switching," DTIC Document1952.
[2] K. Hsieh, "The Current progress of NVM," Macronix International Co., Ltd, 2011.
[3] K. M. Kim, B. J. Choi, and C. S. Hwang, "Localized switching mechanism in resistive switching of atomic-layer-deposited TiO2 thin films," Applied physics letters, vol. 90, p. 2906, 2007.
[4] A. Sawa, "Resistive switching in transition metal oxides," Materials today, vol. 11, pp. 28-36, 2008.
[5] J. Y. Chen, C. L. Hsin, C. W. Huang, C. H. Chiu, Y. T. Huang,
S. J. Lin, W. W. Wu, L. J. Chen, "Dynamic evolution of conducting nanofilament in resistive switching memories," Nano letters, vol. 13, pp. 3671-3677, 2013.
[6] H. S. P. Wong, H. Y. Lee, S. Yu, Y. S. Chen, Y. Wu, P. S. Chen,
B. Lee, F. T. Chen, M. J. Tsai, "Metal–oxide RRAM," Proceedings of the IEEE, vol. 100, pp. 1951-1970, 2012.
[7] P. J. Kuekes, D. R. Stewart, and R. S. Williams, "The crossbar latch: Logic value storage, restoration, and inversion in crossbar circuits," Journal of Applied Physics, vol. 97, p. 034301, 2005.
[8] T. Chao, "Introduction to semiconductor manufacturing technology," 2001.
[9] D. A. Skoog and D. M. West, Principles of instrumental analysis vol. 158: Saunders College Philadelphia, 1980.

[10] K. C. Chang, T. M. Tsai, T. C. Chang, K. H. Chen, R. Zhang,
Z. Y. Wang, J. H. Chen, T. F. Young, M. C. Chen, T. J. Chu, S. Y. Huang,
Y. E. Syu, D. H. Bao, S. M. Sze, "Dual ion effect of the lithium silicate resistance random access memory," IEEE Electron Device Letters, vol. 35, pp. 530-532, 2014.
[11] M. Li, Y.-J. Liu, J.-x. Zhao, and X.-g. Wang, "Si clusters/defective graphene composites as Li-ion batteries anode materials: A density functional study," Applied Surface Science, vol. 345, pp. 337-343, 2015.
[12] K. C. Chang, R. Zhang, T. C. Chang, T. M. Tsai, J. Lou, J. H. Chen,
T. F. Young, M. C. Chen, Y. L. Yang, Y. C. Pan, G. W. Chang, T. J. Chu,
C. C. Shih, J. Y. Chen, C. H. Pan, Y. T. Su, Y. E. Syu, Y. H. Tai, S. M. Sze, "Origin of hopping conduction in graphene-oxide-doped silicon oxide resistance random access memory devices," IEEE Electron Device Letters, vol. 34, pp. 677-679, 2013.