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博碩士論文 etd-0704101-231430 詳細資訊
Title page for etd-0704101-231430
論文名稱
Title
以鈦酸鉛鎂薄膜作為場效型氫離子感測元件之研究
Study on the Lead Magnesium Titanate Gate H+ Ion Sensitive Field Effect Transistors
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
101
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2001-06-29
繳交日期
Date of Submission
2001-07-04
關鍵字
Keywords
時漂、鈦酸鉛鎂、ISFET、生命週期、遲滯、pH響應
Lead magnesium titanate, Drift, Lifetime, Hysteresis, pH response, pH-ISFET
統計
Statistics
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The thesis/dissertation has been browsed 5800 times, has been downloaded 20383 times.
中文摘要
本論文係採用溶膠—凝膠法(Sol-Gel)的技術製備非晶形鈦酸鉛鎂薄膜(Amorphous lead magnesium titanate,a-PMT)作為場效型氫離子感測元件(pH-ISFET)之感測絕緣層。利用旋轉塗佈法(Spin coating)於SiO2/Si(100)之p-type基板上沈積薄膜以製備EIS結構,藉由C-V量測來探討氫離子濃度與平能帶電壓變化的關係,以瞭解PMT薄膜做為離子感測層之響應程度。同時亦將非晶形鈦酸鉛鎂薄膜備製於ISFET之SiO2閘極上,形成雙層閘極結構,並藉由I-V量測來瞭解於不同pH值之緩衝液中起始電位(Threshold voltage)之變化情形。製程中,吾人於鈦酸鉛中摻雜不同比例之鎂含量,並改變薄膜之燒結溫度及厚度探討其對感測度及穩定性之影響。
實驗結果顯示非晶形鈦酸鉛鎂薄膜於摻雜Mg含量為4 mole%,燒結溫度為400℃及薄膜厚度約0.5
Abstract
In this thesis, the a-PMT (amorphous lead magnesium titanate) membranes have been prepared by sol-gel technique as H+ ion sensitive layers. The C-V measurements of the a-PMT/SiO2/Si EIS structures prepared by spin-on coating are used for examining the fabrication parameters and sensing properties. There exhibits the quasi-Nerstain response of 55–59 mV/pH in the range of pH 2–12, fabricated with the Mg-modified content of 4 mole%, the firing temperature of about 400 ℃ and the thickness of about 0.5
目次 Table of Contents
摘 要 I
目 錄 IX
圖表目錄 XVIII
第一章 前言 1
第二章 溶膠凝-膠法製備薄膜與分析 6
2.1溶膠-凝膠法 6
2.1.1 起始溶液的調配 8
2.1.2 薄膜製作 10
2.1.3 低溫焦化處理 11
2.1.4 高溫結晶熱處理 13
2.2 溶液成分分析 14
2.3薄膜性質分析 15
2.3.1 X光繞射分析 15
2.3.2 掃瞄式電子顯微鏡分析 16
2.4 初始溶液的研製與調配 17
2.4.1 原料的選用 17
2.4.2 溶液調配 20
2.5薄膜的製作 21
2.5.1 基板的選擇與清洗 21
2.5.2 薄膜披覆 23
2.5.3 低溫焦化 24
2.5.4 高溫結晶 25
2.6 鈦酸鉛鎂的基本結構 26
第三章 EIS結構之探討 27
3.1 EIS結構之理論特性的探討 27
3.1.1 MIS結構 27
3.1.2表面鍵結分離模型(site-dissociation model) 36
3.1.3 EIS結構 38
3.2 a-PMT之EIS結構的備製 41
3.3 C-V量測系統之建立 43
3.4 EIS結構之分析與討論 44
3.4.1厚度 44
3.4.2燒結溫度 48
3.4.3摻雜Mg含量 50
第四章ISFET元件之探討 53
4.1 ISFET元件之理論特性的探討 53
4.1.1 MOSFET之相關特性 53
4.1.2 ISFET元件之特性 55
4.1.3 恆壓恆流法電路量測原理 64
4.2 a-PMT之ISFET元件的備製 65
4.3 I-V量測系統之建立 68
4.4 ISFET元件之分析與討論 70
4.6.1 ISFET的IDS-VGS量測 70
4.6.2 ISFET的IDS-VDS量測 71
4.5讀出電路 74
4.5.1恆壓恆流電路之原理 74
4.5.2讀出電路之量測結果 76
第五章 不理想因素之研究 77
5.1時漂效應之探討 77
5.1.1時漂之定義 77
5.1.2時漂之量測與系統之建立 84
5.1.3時漂現象之結果與討論 85
5.2遲滯效應之探討 87
5.2.1遲滯之定義 87
5.2.2遲滯之量測與系統之建立 89
5.2.3遲滯現象之結果與討論 90
5.3反應速率之探討 91
5.3.1反應速率之定義 91
5.3.2反應速率之量測與系統之建立 93
5.3.3反應速率之結果與討論 93
5.4生命週期之探討 94
第六章 結論 96
參考文獻 98

圖表目錄
頁次
圖1.1 PMT ISFET之研究架構圖……………………………… 49
圖2.1 旋轉塗佈法之塗佈流程………………………………… 50
圖2.2 PMT(2)之熱重分析與熱差分析………………………… 51
圖2.3 熱處理溫度為800℃下,摻雜不同Mg含量之PMT薄膜的XRD分析………………………………………….. 52
圖2.4 PMT薄膜製備流程圖…………………………………… 53
圖2.5 鈦酸鉛之晶體結構:(a)頂視圖 (b)立體圖…….. 54
圖3.1 MIS電容器之結構圖……………………………………. 55
圖3.2 C-V曲線圖………………………………………………. 56
圖3.3 在EIS結構電荷密度和電位分佈圖……………………. 57
圖3.4 a-PMT/SiO2/Si之EIS結構剖面圖……………………… 58
圖3.5 EIS系統之等效電路…………………………………….. 59
圖3.6 MIS結構於熱平衡時之能帶圖…………………………. 60
圖3.7 EIS結構之元件封裝流程……………………………….. 61
圖3.8 a-PMT/SiO2/Si/Al之封裝結構示意圖…………………... 62
圖3.9 C-V量測系統……………………………………………. 63
圖3.10 不同厚度之PMT的SEM圖形(a)0.25
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