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博碩士論文 etd-0704114-124835 詳細資訊
Title page for etd-0704114-124835
論文名稱
Title
用於相移全橋轉換器輕載效率提昇之可變怠滯時間控制策略
Variable Dead Time Control Strategies for Light-Load Efficiency Improvement of Phase-Shift Full-Bridge Converters
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
117
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2014-07-28
繳交日期
Date of Submission
2014-08-15
關鍵字
Keywords
輕載效率、零電壓切換、相移式全橋轉換器、怠滯時間調整
Light-Load Efficiency, Variable Dead Time Control, Zero-Voltage Switching (ZVS), Phase-Shift Full-Bridge Converter (PSFBC)
統計
Statistics
本論文已被瀏覽 5734 次,被下載 161
The thesis/dissertation has been browsed 5734 times, has been downloaded 161 times.
中文摘要
傳統的相移全橋轉換器(Phase-Shift Full-Bridge Converter, PSFBC)透過開關訊號的相移控制使得電路開關達到零電壓切換(Zero-Voltage Switching, ZVS),然其零電壓切換條件受限於諧振電感與諧振電流大小。傳統相移全橋轉換器,因輕載時無法產生較大的諧振電流而無法達成零電壓切換,也造成傳統相移全橋轉換器之輕載效率不佳,因此如何提昇相移全橋轉換器的輕載效率一直是相移全橋轉換器的改進目標。以往提昇相移全橋轉換器輕載效率的技術大多是在電路架構上增加一些電容與電感等被動元件,讓電路能在輕載時達成如零電流切換,或者增加諧振電感感值以增加其儲能,加速開關元件釋能達成零電壓切換等。這些方法確實可有效提昇相移全橋轉換器的輕載轉換效率,然此會造成額外的電路成本及體積。本論文針對相移全橋轉換器之輕載控制技術進行研究,在不增加額外電路元件下,透過相移全橋轉換器之怠滯時間(Dead Time)調整來達成輕載效率的提昇。本論文並設計及研製一輸入電壓320V,輸出電壓48V且額定輸出功率480W的相移全橋轉換器。實驗針對單一落後臂開關進行調整,測試並分析傳統怠滯時間控制策略及本文所提出之怠滯時間控制策略的效率差異。其結果顯示在落後臂兩開關條件相同的情況下,本文所提出之可變怠滯時間控制策略於輕載下(輸出電流0.2-1.7A)下,至多可提昇傳統怠滯時間控制策略2.16%的效率,而相較於無怠滯時間控制之傳統相移全橋則至多可提昇5.14%之效率。
Abstract
Generally, the Phase-Shift Full-Bridge Converter (PSFBC) could achieve Zero-Voltage Switching (ZVS) for power switches by controlling the phase shift of switch signals. However, constrained by the resonant inductor and the resonant current, the traditional PSFBC can’t achieve ZVS for light loads due to small resonant current.It results in low efficiency for light loads. Therefore, how to improve and enhance the light-load efficiency of PSFBC is emerging and needs to be realized. In the past, adding the passive components such as capacitors and inductors into the PSFBC was a common technique to enhance the light-load efficiency of PSFBC since they could achieve ZVS under light load. Moreover, increasing inductance value, which enhanced the energy capacity, was also the way used to accelerate the process to achieve ZVS. Though these methods are certain to increase the efficiency, they still have the problems of extra cost and volume in the circuit. This thesis aims to improve the light-load efficiency of PSFBC by dead time adjustment. By the proposed variable dead-time control strategies, the light-load efficiency of PSFBC can be improved without adding extra electronic components. A PSFBC with specification of the input voltage 320V, output voltage 48V, and rate power 480W is designed and implemented in this thesis. Experiments adjust the dead time for one of the switches of lagging leg of PSFBC and compare the efficiency differences of the conventional dead-time control strategy to the proposed dead-time control strategies. Experimental results show that using two same switches for lagging leg of PSFBC, the maximum efficiency improvement for light loads between the proposed dead-time control strategies and the conventional one is 2.16% (output currents between 0.2A to 1.7A). Besides, comparing with the traditional PSFBC without dead-time adjustment, maximum efficiency improvement, 5.14%, can be achieved for light loads by the proposed dead-time control strategies.
目次 Table of Contents
論文審定書 i
誌謝 ii
摘要 iii
Abstract iv
目錄 v
圖目錄 viii
表目錄 xii
第一章 緒論 1
1-1研究背景 1
1-2 研究動機 3
1-3 論文大鋼 4
第二章 相移全橋轉換器及控制技術簡介 6
2-1相移式全橋轉換器 6
2-2相移式全橋轉換器之電路動作模式分析 8
2-3相移式全橋轉換器諧振電流推導 18
2-4相移式全橋轉換器的缺點 23
2-4.1 輕載時無法達到零電壓切換 23
2-4.2 二次側導通率損失 24
2-4.3 循環能量損失 26
2-5改良型相移式全橋轉換器 27
2-5.1 增加輕載時怠滯時間 28
2-5.2 不同的訊號延遲時間 30
2-5.3 多模式的開關控制策略 31
第三章 用於相移全橋轉換器之可變怠滯時間控制策略 34
3-1本文可變怠滯時間控制策略之優點 34
3-2可變怠滯時間控制策略 36
3-3相移式全橋轉換器之切換損失及循環損失推導 46
3-3.1 開關切換損失 48
3-3.2 循環電流損失 52
第四章 實驗電路設計與控制 55
4-1電路元件設計考量 55
4-1.1高頻變壓器設計 55
4-1.2領先臂零電壓導通條件 59
4-1.3落後臂零電壓導通條件 60
4-1.4輸出電感設計考量[51] 61
4-1.5輸出電容設計考量[1] 62
4-1.6功率開關元件選擇 63
4-2電路參數設計 63
變壓器設計實例 64
輸出電感設計 65
輸出電容設計 65
4-3周邊電路設計 66
4-3.1隔離驅動電路 66
4-3.2取樣電路設計 67
4-4控制晶片設計 68
4-4.1dsPIC33FJ16GS504數位訊號控制器與MPLAB簡介 69
4-4.2程式設計流程介紹 72
4-4.3 PI控制 75
第五章 實驗及分析結果 79
5-1相移全橋轉換器之測試電路規格 79
5-2實際波形量測 79
5-2.1開迴路相移控制訊號測試與零電壓切換 79
5-2.2諧振週期計算與量測 81
5-2.3可變之怠滯時間控制策略 82
5-2.4不同開關元件測試 88
5-3效率比較 90
第六章 結論與未來展望 95
6-1結論 95
6-2未來展望 95
參考文獻 97
附錄A單一落後臂開關怠滯時間調整說明圖 101
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