摘要

本篇論文主旨在於藉由電氣量測及高溫回火來探討超薄高介電質層與半導體介面的特性。研究的樣品結構分別為Y2O3 / Si、Gd2O3 / GaAs、Ga2O3(Gd2O3) / GaAs等三種材料的MOS電容。我們利用不同頻率的C-V、G-V量測發現，由於介電質層很薄的緣故，使得串聯和並聯寄生電阻的影響變的很大，因此產生色散現象，我們利用一個小訊號等效電路模型由二種高頻的量測結果去求得精確的電容。我們亦利用高溫回火以去除水氣的污染及改善其特性，包括氧化層電荷、介面能態密度與漏電流都可以有效的減少。在425℃的回火後可得到Y2O3 / Si的氧化層電荷減少至7.7 x 1010 cm-2，而中能帶的介面能態密度也可以減低至3.6 x 1010 cm-2，並且等效的二氧化矽厚度可達52Å；而Gd2O3 / GaAs可得其氧化層電荷為9.8 x 1011 cm-2，中能帶的介面能態密度為2 x 1011 cm-2，且等效的二氧化矽厚度可達57Å；還有Ga2O3(Gd2O3) / GaAs可得其氧化層電荷為4.2 x 1012 cm-2，中能帶的介面能態密度為6 x 1011 cm-2，且等效的二氧化矽厚度可達91Å。不過我們分析所得的介電值卻比文獻上所提出的要小，這應該是由於高介電層/半導體介面上形成過渡介面層，以致等效介電值降低。

Abstract

The purpose of this thesis is to study the electrical characteristics of ultra-thin high-k gate oxide-semiconductor interfaces. The measured samples are Y2O3/Si、Gd2O3/GaAs、Ga2O3(Gd2O3)/GaAs MOS capacitors. An accurate C-V relation has been obtained consistently by using a model that includes both series and shunt parasitic resistances. Using the semiconductor parameters and the oxide parameters, an ideal C-V curve with Dit = 0 is fitted to the accurate capacitance data, and the interface state density is deduced by Terman method. After post - metallization annealing (PMA) at 425℃, the oxide charge density, interface state density and leakage current were reduced. The results are following : (1) For Y2O3/Si MOS capacitors, we obtained a oxide charge density ~ 7.7 x 1010 cm-2, an interface state density ~ 3.6 x 1010 cm-2ev-1, and an equivalent oxide thickness ~ 52Å; (2) For Gd2O3/GaAs MOS capacitors, we obtained a oxide charge density ~ 9.8 x 1011 cm-2, an interface state density ~ 2 x 1011 cm-2ev-1, and an equivalent oxide thickness ~ 57Å; (3) For Ga2O3(Gd2O3)/GaAs MOS capacitors, we obtained a oxide charge density ~ 4.2 x 1012 cm-2, an interface state density ~ 6 x 1011 cm-2ev-1, and an equivalent oxide thickness ~ 91Å. The dielectric constants obtained from our data are smaller than the reported values. A possible explanation is that an interfacial layer formed at the oxide/semiconductor interface to reduce equivalent dielectric constant.

目錄

第一章 導論……………………………………………………………..1
1-1 前言………………………………………………………...1
1-2 高介電值氧化層的應用…………………………………...2
1-3 論文架構…………………………………………………...3

第二章 實驗相關原理…………………………………………………..5
2-1 金氧半二極體電容………………………………………...5
2-2 超薄MOS diode的小訊號等效電路模型……………..…9
2-3 氧化層與半導體介面上的缺陷………………………….12
2-4 金半功函數差與氧化物電荷………………………….…13
2-5 介面陷阱電荷………………………………………….…14
2-6 Fowler Nordheim的穿遂電流………………………….18


第三章 實驗系統與方法………………………………………………20
3-1 金氧半二極體的製作…………………………………….20
3-2 半導體元件電氣量測系統……………………………….21
3-3 熱處理系統……………………………………………….22

第四章 量測結果與分析……………………………………………....25
4-1 Y2O3 / Si NMOS (MH1726-2)結果分析……………….…25
4-1.1 電容曲線分析……………………………………..25
4-1.2 電流曲線分析……………………………..……….27
4-2 Y2O3 / Si PMOS (MH1704-2)結果分析…………………..41
4-3 Y2O3 / Si PMOS (MH1704-3)結果分析…………………..47
4-4 Gd2O3 / GaAs NMOS (MH1825)結果分析…………….…53
4-5 Ga2O3(Gd2O3) / GaAs NMOS (MH1421)結果分析………62

第五章 結論……………………………………………………………67

參考文獻…………………………………………………………….….68
附錄………………………………………………………………….….70

參考文獻

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