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博碩士論文 etd-0709104-181407 詳細資訊
Title page for etd-0709104-181407
論文名稱
Title
低電壓低功率D類放大器
Low Voltage Low Power Class D Power Amplifier
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
36
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2004-06-30
繳交日期
Date of Submission
2004-07-09
關鍵字
Keywords
低功率、低電壓、放大器、D類
Low Voltage, Low Power, Class D, Power Amplifier
統計
Statistics
本論文已被瀏覽 5662 次,被下載 56
The thesis/dissertation has been browsed 5662 times, has been downloaded 56 times.
中文摘要
D類功率放大器一般應用在高效率的電路當中,應用在助聽器的系統當中,除了需較高的效率之外,我們也求較低的工作電壓以及較低的功率,而操作頻率是屬於低頻的訊號。
我們的電路設計是基於TSMC 035 製程技術,電路的工作電壓是1.5V和允許的輸入信號頻率是4KHz,經模擬之後,更進一步的證明出D類放大器是一種高效率的放大器。當我們使用2KHz的操作頻率和振幅是0.3V的輸入訊號時,我們可以得到最大的總諧波失真是0.63%和靜態電流是4uA以及83.6%的效率。
Abstract
Class D power amplifier applies in high efficiency circuit. In hearing aid system, we require high power efficiency, low-voltage and low-power. The operation of frequency is low frequency.

All the circuits are designed based on the TSMC 035 CMOS process technology. The supply voltage is 1.5V and the input signal is 4KHz. Simulation results show that the Class D power efficiency is high efficiency amplifier. When 0.3V of 2KHz input signal is applied, The maximum THD is 0.63% and static current is 4uA and the efficiency is 83.6%.
目次 Table of Contents
Abstract

Chapter 1 Introduction 1
1.1 Basic Concept 1
1.2 Principles of Class D Power Amplifier 2
1.3 A Structure of Pulse Width Modulation 4

Chapter 2 Previous Class D Circuits 7
2.1 Mead’s Circuit 7
2.1.1 Basic Theorem and Circuit 7
2.1.2 Problems of this Circuit 9
2.2 Previous Improvement Circuit 13

Chapter 3 The Proposed Circuit 15
3.1 Basic Concept and Idea 15
3.2 Improvement Circuit 17
3.2.1 Triangular Wave Generation 19
3.2.2 Output Stage 21
3.2.3 Effect of Output Stage on Resistance 22
3.2.4 Effect of Harmonic Distortion 24
3.2.5 The Power Efficiency 26

Chapter 4  Simulation Results and Discussions 27
Chapter 5 Conclusion 34
Reference
參考文獻 References
Reference


[1] Meng-Tong Tan, Joseph S. Chang, Hock-Chuan Chua, and Bah-Hwee Gwee, “An investigation into the parameters affecting total harmonic distortion in low-voltage low-power class-d amplifiers,” IEEE Transactions on Circuits and Systems Vol. 50, No, 10, OCTOBER 2003.

[2] Bah-Hwee Gwee, Joseph S. Chang, Victor Adrian and Haryanto Amir, “A novel sampling process and pulse generator for a low distortion digital pulse-width modulator for digital class D amplifiers,” Circuits and Systems, 2003. ISCAS ’03. Proceedings of the 2003 International Symposium on, Volume : 4, 25-28 May.

[3] Joseph S. Chang, Meng-Tong Tan, Zhihong Cheng, and Yit-Chow Tong, “Analysis and design of power efficient class D amplifier output stages,” IEEE Transactions on Circuits and Systems, Vol. 47, No.6, JUNE 2000.

[4] M.C. Killion and G. Village, “Class D hearing aid amp,” US Patent No. 4,689,819, 1987.

[5] M.T. Tan, J.S. Chang and Y.C. Tong, “A novel self-tuning pulse width modulator based on master-slave architecture for a class D amplifier,” Circuits and Systems, 1999. ISCAS ’99. Proceedings of the 1999 IEEE International Symposium on, Volume: 2, 30 May-2 June 1999.

[6] M.T. Tan, J.S. Chang, Z.H. Chang Y.C. Tong, “A novel self-error correction pulse width modulator for a class D amplifier for hearing instruments,” Circuits and Systems, 1998. ISCAS ’98. Proceeding of the 1998 IEEE International Symposium on, Volume : 1, 31 May-3 June 1998.

[7] R. Jacob Baker, Harry W. Li and David E. Boyce, “CMOS Circuit Design, Layout, and Simulation,” The Institute of Electrical and Electronics Engineers, Inc., New York, pp.463-503

[8] Dallas Maxim, “Class D audio amplifier output filter optimization,” www.maxim-ic.com/an624, Apr 01, 2002.

[9] Norbert R. Malik, “Electronic circuits analysis, simulation, and design,” Prentice Hall International Editions, Vol. 10, pp. 751-798, 1995.
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