時至今日，行動式電子產品，如智慧型手機、平板電腦、筆記型電腦等，已經在現代人類生活中佔有不可或缺的地位，加上科技的迅速發展以及人們對品質的要求，在其上裝設三維繪圖系統更是大勢所趨。三維繪圖系統為了提供高輸出品質以及執行效率，導致行動式電子產品的電力消耗大量提升。再加上莫爾定理(Moore’s law)與製程的快速發展，相同面積的積體電路所能容納之電晶體數目急遽增加，也造成了驚人的功率消耗。對於這些嵌入式系統而言，其電源供應是來自於電池，而電池所能儲存的電量是有限的，因此如何在有限的電量下進行電源管理是相當重要的課題。
　　動態電壓與頻率調整(Dynamic Voltage and Frequency Scaling, DVFS)是最常使用的電源管理方式之一。動態電壓與頻率調整可以根據過去frame所產生的工作量為基礎，用以預測下一個frame可能的工作量，並以這個預測的工作量動態地調整下一個frame的處理電壓與頻率。電壓與頻率分為多個固定的層級，層級的數量可以根據使用者的需要而有所不同。多重精確度(Multi-precision)技術則是根據使用者需求調整其指令運算時資料的有效位元數目，藉由降低少許的輸出品質來減少功率消耗。
　　本論文整合三維繪圖系統中的動態電壓頻率與多重精確度調整的之電源管理方法，以虛擬平台(Virtual Platform)模擬三維繪圖系統晶片(System on Chip, SoC)並且進行環境整合與系統驗證，此平台可以提供快速的TLM (Transaction Level Model)建模與系統之間的效能分析，因此在設計前端就可以分析SoC架構，進而改善整體效能，避免在後端才發現問題而造成昂貴的成本損失。

Nowadays, mobile devices such as smart phone, tablet and laptop have been indispensable in people’s daily lives. With the rapid development of technology and for the human material needs, integrating the 3D graphics system into the mobile devices is an irresistible trend. 3D graphics system provides high output quality and high efficiency, so that the power consumption of mobile devices increases rapidly. Moreover, the Moore’s law goes on and the technology process grows up. The number of transistors that the same area of an integrated circuit can contain is also increasing, which leads to a great amount of power consumption. For these embedded systems, the power supply comes from the battery. However, the power of the battery is limited. Therefore, how to apply the power management to reduce the power consumption of a system within the limited power is an important issue.
Dynamic Voltage and Frequency Scaling is a common power management strategy. It uses the workloads generated by previous frames to predict the workload of the next frame. According to the predicted value, it dynamically adjusts the operating voltage and frequency of the next frame. The operating voltage and frequency are divided into several levels, and the number of levels is based on user’s requirement. In addition, multi-precision technique can adjust the number of the most significant mantissa bits used in the 3D graphics system. By acceptably lowering the output quality, we can further reduce the power consumption.
This thesis integrates DVFS and multi-precision techniques into the 3D graphics system. We use virtual platform to construct the 3D graphics SoC and perform environmental integration and system verification. This platform provides fast transaction level modeling and the performance analysis of the whole system. So, we can analyze SoC architecture for optimizing the performance when we work on front-end design. By doing this, we can avoid the high-cost redesign which causes by encountering the problem at the back-end.

論文審定書 i
論文提要 ii
致謝 iii
摘要 iv
Abstract v
目錄 vii
圖目錄 ix
表目錄 xi
第一章 緒論 1
1.1 研究動機 1
1.2 論文大綱 3
第二章 研究背景 4
2.1 電源管理 4
2.1.1 功率消耗的種類 4
2.1.2 電源管理基本概念 6
2.2 三維繪圖 10
2.2.1 三維繪圖管線流程 10
2.2.2 繪圖API簡介 12
2.3 ATTILA模擬器 15
2.3.1 模擬器架構 15
2.3.2 模擬器驗證流程 19
2.4 Platform Architect 21
第三章 動態電壓與頻率調整 22
3.1 預測器 22
3.1.1 Uniform Window-size Predictor One (UW1) 22
3.1.2 Uniform Window-size Predictor Four (UW4) 23
3.2 延遲顯示機制 (Delayed Display Scheme) 26
3.2.1 雙倍緩衝儲存器 26
3.2.2 延遲顯示機制 28
3.2.3 延續式失誤處理 29
3.3 C Model模擬 32
3.4.1 測試範例 (Benchmarks) 32
3.4.2 電壓與頻率表 (V/F Table) 34
第四章 實驗方法與數據 36
4.1 C Model實驗結果 36
4.2 層級選擇器硬體架構 39
4.3 使用Platform Architect進行整合 44
4.3.1 Platform Architect虛擬系統平台建置 44
4.3.2 Verilog Wrapper 45
4.3.3 Platform Architect上的SystemC 47
4.3.4 Platform Architect Memory Mapping 48
4.3.5 ARM DS-5系統模擬與軟硬體除錯 50
4.3.6 VP Explorer系統效能分析 53
4.4 整合多重精確度與動態電壓頻率調整 56
4.4.1 以ATTILA實作多重精確度 56
4.4.2 DVFS與多重精確度之實驗結果 59
第五章 結論與未來研究方向 62
5.1 結論 62
5.2 未來研究方向 63
參考文獻 64

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[8] Khronos Group: http://www.khronos.org/
[9] ATTILA: http://attila.ac.upc.edu/wiki/index.php/Main_Page
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http://oss.sgi.com/projects/ogl-sample/registry/ARB/vertex_program.txt
[11] ARB Fragment Program Extension:
http://oss.sgi.com/projects/ogl-sample/registry/ARB/fragment_program.txt
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