本篇論文介紹一個操作在1.1伏特，功率消耗25微瓦的積分三角調變器應用在語音範圍。本篇所採用的架構是建立在開關電容電路的技術上來實現。利用拔靴帶式開關來取代傳統的CMOS傳輸閘，以改善開關電容電路在低壓下驅動能力不足之情形。同時為了更有效降低功率的消耗，我們採用改良式的電流鏡放大器，也提昇了10~20dB的增益，彌補了傳統電流鏡放大器增益的不足，同時達到軌對軌的輸出擺幅。Post-simulation結果顯示此調變器的動態範圍達到77dB，信號對雜訊比為82dB，在1.1V供應電壓下，整體的功率消耗為25μW，使用台灣積體電路製造公司(TSMC)所提供的0.18μm 1P6M CMOS製程技術。

A low voltage low power sigma–delta modulator for voice applications is presented. The implementation of proposed sigma-delta modulator is based on switched-capacitor circuit. Bootstrapped switches were used to replace CMOS transmission gates for increasing the insufficient driving of switched-capacitor circuit under the low voltage operation. To reduce the power dissipation, an improved current mirror OTA were designed with rail-to-rail output swing, which can also make the voltage gain enhance 10~20 dB and overcome the poor voltage gain shortage of traditional current mirror OTA. The post-simulation result shows that the modulator achieves a dynamic range of 77 dB, a peak signal-to-noise ratio of 82 dB, and the sigma-delta modulator dissipates 25μW under 1.1-V voltage supply, using TSMC 0.18μm 1P6M CMOS technology.

摘 要 I
Abstract II
誌 謝 III
目 錄 IV
圖 目 錄 VI
表 目 錄 VIII
第一章 緒論 1
1.1 研究動機 1
1.2 研究目的 2
1.3 論文架構 3
第二章 積分-三角調變器之原理 4
2.1 超取樣轉換器原理 4
2.1.1 量化誤差 4
2.1.2 超取樣原理 6
2.1.3 雜訊移頻 9
2.2 積分-三角調變器的架構 10
2.2.1 積分-三角調變器的基礎架構 10
2.2.2 單迴路單位元積分-三角調變器 12
2.2.3 多位元的積分-三角調變器 13
2.2.4 多級串接積分-三角調變器 13
2.3 離散時間的積分-三角調變器的設計 15
2.4 過去積分-三角調變器的比較 16
第三章 積分-三角調變器的電路設計 21
3.1 整體電路的架構設計和考量 21
3.2 低壓下的開關電容積分器 22
3.2.1 全差動式放大器的改良 22
3.2.2 bootstrapped開關 27
3.2.3 開關電容積分器 29
3.3 積分-三角調變器的電路模擬 31
第四章 積分-三角調變器的實現 37
4.1 整體電路之佈局與模擬結果 37
4.2 結果與討論 39
第五章 未來發展 42
第六章 結論 43
參 考 文 獻 44
附 錄 投稿VLSI會議論文(submitted) 47

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