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博碩士論文 etd-0711112-071939 詳細資訊
Title page for etd-0711112-071939
論文名稱
Title
適用於FPW元件之IgE感測系統之電壓峰值偵測電路
Voltage Peak Detector Design for FPW-based IgE Measurement Systems
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
82
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2012-06-21
繳交日期
Date of Submission
2012-07-11
關鍵字
Keywords
IgE感測系統、電壓峰值偵測電路、FPW感測元件、兩段式取樣、濾波器
FPW biosensor, filter, double sampling, voltage peak detector, IgE measurement systems
統計
Statistics
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中文摘要
本論文主要探討的主題是設計出一電壓峰值偵測電路,使其可作為FPW元件為基礎之IgE感測系統內所需的電壓偵測電路,本論文提出兩個電路架構。

第一個設計為兩段式取樣之電壓峰值偵測電路,本設計藉由對FPW生醫感測器之輸出訊號作兩次取樣與鎖值的動作,降低鎖值電容在取樣與鎖值之間造成的漣波,解決原本傳統的電壓峰值偵測電路在偵測FPW生醫感測器之訊號時會發生的誤判,而此架構可偵測的訊號頻率最高可達10 MHz。

第二個設計為具有濾波整流之電壓峰值偵測電路,本設計藉由在前端先對輸入訊號作整流與濾波,將訊號輸入進一耦合電容、一單增益緩衝器與八階電壓控制電壓源低通濾波器,進行濾波處理後,可得到趨近直流之電壓差訊號,再經由非反相放大器將訊號差異性放大,可大幅降低後端放大器之規格需求,並提高整體電路之性能與解析度。且藉由將傳統的充電開關改為由前端之非反相放大器充電,可降低充電時間,增加電路之工作效率,及減少過充現象。此架構可偵測的訊號頻率最高可達50 MHz,且量測時可達到0.357 %之解析度。
Abstract
The main subject of this thesis is to design a voltage peak detector for FPW-based IgE measurement systems. Therefore, two different peak detectors are proposed.

The first voltage peak detector basically samples the input signal twice (double sampling) to reduce the ripples appearing during the sample and hold modes. This voltage peak detector also resolves the detection error of conventional voltage peak detectors when they are used to detect the output signal of FPW-based biosensors.The fastest signal which this voltage peak detector can detect is 10 MHz.

The second voltage peak detector is composed of a coupling capacitor, an unity gain buffer, an 8th order voltage control voltage source(VCVS) low pass filter, and a non-inverting amplifier. The major difference of this design from the previous one is to filter and amplify the input signal. The specification requirements of the operational transconductance amplifier in this voltage peak detector can be relaxed thereafter. The resolution and performance of the sensing system are also improved. By replacing the conventional power MOS by a non-inverting amplifier, the charging time is reduced and over charge hazard is avoided. Besides, the speed of the entire system is enhanced. The fastest signal which this voltage peak detector can detect is 50 MHz and the precision is 0.357 %.
目次 Table of Contents
致謝 i
摘要 ii
Abstract iii
目錄 iv
表目錄 x

第一章 概論 p.1
1.1 前言 p.1
1.2 偵測IgE濃度之相關文獻研討 p.6
1.3 頻移讀取電路介紹 p.7
1.4 電壓峰值偵測電路之研究動機 p.9
1.5 電壓峰值偵測電路之相關技術探討 p.10
1.5.1 傳統電壓峰值偵測電路 p.10
1.5.2 電壓峰值偵測電路之相關文獻探討 p.14
1.6 論文大綱 p.15

第二章 兩段式取樣之電壓峰值偵測電路 p.17
2.1 電壓峰值偵測電路在頻移讀取電路內之作用 p.17
2.2 兩段式取樣之電壓峰值偵測電路設計 p.22
2.2.1 兩段式取樣之電壓峰值偵測電路 p.22
2.2.2 二階運算轉導放大器 p.27
2.2.3 帶隙參考電壓源 p.28
2.3 兩段式取樣之電壓峰值偵測電路模擬 p.30
2.3.1 二階運算轉導放大器接上帶隙參考電壓源後之模擬結果 p.30
2.3.2 兩段式取樣之電壓峰值偵測電路模擬結果 p.31
2.3.3 兩段式取樣之電壓峰值偵測電路效能比較 p.34
2.4 兩段式取樣之電壓峰值偵測電路晶片佈局 p.35
2.5 兩段式取樣之電壓峰值偵測電路晶片量測與討論 p.36

第三章 具有濾波整流之電壓峰值偵測電路 p.38
3.1 整流與濾波FPW生醫感測器之輸出訊號 p.38
3.2 具有濾波整流之電壓峰值偵測電路之架構與設計 p.40
3.2.1 前置訊號處理 p.40
3.2.2 八階電壓控制電壓源低通濾波器 p.42
3.2.3 取樣與鎖值電路 p.45
3.2.4 寬輸入範圍串接式運算轉導放大器 p.48
3.2.5 偏壓產生電路 p.51
3.3 具有濾波整流之電壓峰值偵測電路模擬結果 p.52
3.3.1 八階電壓控制電壓源低通濾波器之模擬結果 p.53
3.3.2 寬輸入範圍串接式運算轉導放大器之模擬結果 p.53
3.3.3 具有濾波整流之電壓峰值偵測電路之模擬結果 p.55
3.3.4 具有濾波整流之電壓峰值偵測電路之效能比較 p.58
3.4 具有濾波整流之電壓峰值偵測電路之晶片佈局 p.59
3.5 具有濾波整流之電壓峰值偵測電路晶片量測與討論 p.60

第四章 結論及成果 p.62

參考文獻 p.65





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