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博碩士論文 etd-0712102-170041 詳細資訊
Title page for etd-0712102-170041
論文名稱
Title
以溶膠-凝膠法製備鈦酸鉛鑭薄膜作為氫離子 場效電晶體感測器之研究
Hydrogen ion-sensitive field effect transistor with sol-gel-derived La-modified lead titanate gate
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
137
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2002-06-28
繳交日期
Date of Submission
2002-07-12
關鍵字
Keywords
溶膠-凝膠法、鈦酸鉛鑭、時漂、ISFET、遲滯、酸鹼感測計
Drift, Sol-gel, Lead lanthanum titanate, pH meter, ISFET, Hysteresis
統計
Statistics
本論文已被瀏覽 5693 次,被下載 5661
The thesis/dissertation has been browsed 5693 times, has been downloaded 5661 times.
中文摘要
以溶膠-凝膠法製備鈦酸鉛鑭薄膜作為氫離子
場效電晶體感測器之研究
國立中山大學電機工程研究所
蘇仁福* 陳英忠**
摘 要
本論文係以溶膠-凝膠(Sol-gel)法製備非晶形鈦酸鉛鑭(Amorphous lead lanthanum titanate, PLT)薄膜作為氫離子場效電晶體之感測閘極。利用旋轉塗佈法(Spin coating)於SiO2/Si(100)之p-type基板上沈積薄膜以製備PLT/SiO2/Si EIS結構,藉由C-V量測來探討平能帶(Flat band)電壓變化的關係,以瞭解PLT材料做為氫離子感測層之響應程度。在製程上,鑭含量與燒結溫度兩參數將被討論其對感測度及穩定性之影響。此外,鈦酸鉛鑭薄膜亦被披覆於SiO2 gate ISFET上,形成雙層閘極結構之PLT/SiO2 gate ISFET,並藉由I-V量測來瞭解不同pH值於緩衝液中之起始電位(Threshold voltage)變化情形,進而獲得元件之相關特性。
依據實驗結果,發現非晶形鈦酸鉛鑭薄膜於摻雜鑭含量為3 mol%且燒結溫度在400℃時,所獲得之感測度及穩定性為最佳,其感測度約為44~52 mV/pH。此外,關於時漂(Drift)、遲滯(Hysteresis)與生命週期(Lifetime)等非理想因素,亦呈現出優良之穩定性。最後,酸鹼度離子感測器電路的設計與製作亦被提出;藉由類比前端電路、類比/數位轉換器、單晶片微電腦(Single chip microcomputer)及LCD液晶顯示器整合方式來進行,以實現酸鹼度離子感測器系統。
關鍵字:ISFET、溶膠-凝膠法、鈦酸鉛鑭、時漂、遲滯、酸鹼感測計
*研究生
**指導教授

Abstract
Hydrogen ion-sensitive field effect transistor with sol-gel-derived La-modified lead titanate gate
Department of Electrical Engineering, National Sun Yat-Sen University
*Jen-Fu Su **Ying-Chung Chen
Abstract
In this thesis the amorphous lead lanthanum titanate (Pb1-xLaxTi1-x/4O3, PLT) membrane has been prepared by sol-gel method as a novel pH-sensitive layer. The lead lanthanum titanate membrane was directly deposited on the SiO2(1000Å)/p-Si substrate by spin-on coating to form the PLT/SiO2/Si EIS structure. The C-V measurement was used for examining the fabrication parameters and sensing properties. Moreover, the PLT membrane was grown onto the SiO2 gate ISFET as the PLT/SiO2 gate ISFET. The electrical properties with the different parameter conditions can be obtained by the I-V measurement.
Experimental results show that the fabrication parameters and characteristics of the PLT membrane are determined at the La-modified content about 3 mol% and the firing temperature of 400℃ via the EIS structure. There exhibits the pH response of about 44-52 mV/pH in the range of pH 2-12. Furthermore, the nonideal factors, such as drift of 0.1-0.3 mV/h, hysteresis of 2-13 mV and lifetime decay of about 72 mV/pH-day, can be also obtained via the I-V properties of the ISFET. Finally, the hardware architecture of pH measuring system has been built up. The system makes use of constant current and voltage bias technique to ensure that the variations of the output voltage can give directly the variations of pH value. For the purpose of achieving the function of data calibration and driving the liquid crystal display (LCD), the 8051 microprocessor is employed.

Keywords: ISFET, Sol-gel, Lead lanthanum titanate, Drift, Hysteresis, pH meter

* Student
** Advisor

目次 Table of Contents
目 錄
摘 要 I
目 錄 III
圖表目錄 VIII
第一章 前 言 1
第二章 溶膠-凝膠法製備薄膜與分析 4
2.1 溶膠-凝膠法 4
2.1.1 起始溶液的調配 5
2.1.2 薄膜製作 5
2.1.3 焦化與結晶溫度之選擇 6
2.2 初始溶液的研製與調配 7
2.2.1 初始原料的選用 7
2.2.2 溶液調配 8
2.2.3 溶液成分分析 9
2.3 薄膜的製作 9
2.3.1 基板的選擇與清洗 9
2.3.2 薄膜披覆 10
2.4 熱處理過程 10
2.4.1 低溫焦化 10
2.4.2 高溫結晶 11
2.5 薄膜性質分析 11
2.5.1 X光繞射分析 11
2.5.2 掃瞄式電子顯微鏡分析 12
第三章 MIS與EIS結構之探討 14
3.1 ISFET與MOSFET之異同 14
3.2 MIS結構 14
3.2.1 MIS結構理論 14
3.2.2 界面電荷 18
3.2.3 MIS結構製備 18
3.2.4 C-V量測 19
3.2.5 C-V特性曲線 19
3.3 EIS系統 19
3.3.1 吸附鍵結模型 20
3.3.2 EIS結構 22
3.3.3 EIS結構的製備 23
3.3.4 C-V量測系統 24
3.4 EIS結構之分析與討論 25
3.4.1 不同溫度之影響 25
3.4.2 摻雜La含量之影響 25
第四章 ISFET元件 27
4.1 ISFET的基本結構 27
4.2 ISFET的工作原理 27
4.1.1 MOSFET元件 27
4.1.2 ISFET元件 28
4.3 ISFET元件之設計 32
4.3.1 SiO2 gate ISFET元件之製作 32
4.3.2 PLT gate ISFET 元件之製作 33
4.4 ISFET封裝 33
4.5 I-V量測系統 33
4.6 I-V量測結果 34
4.6.1 ISFET的IDS-VGS量測 35
4.6.2 ISFET的IDS-VDS量測 36
4.7 ISFET之感測特性比較 37
第五章 非理想效應之研究 38
5.1時漂效應之探討 38
5.1.1 時漂之定義 38
5.1.2 時漂效應理論之研究 38
5.1.3 時漂量測系統 39
5.1.4 時漂之結果與討論 40
5.2 遲滯效應之研究 40
5.2.1 遲滯之定義 40
5.2.2 遲滯效應理論之研究 41
5.2.3 遲滯量測系統 41
5.2.4 遲滯現象之結果與討論 42
5.3 生命週期之探討 42
5.3.1 生命週期之量測與討論 43
第六章 ISFET感測電路基本架構與系統設計 44
6.1架構說明 44
6.1.1類比前端訊號處理模組 44
6.1.2類比/數位轉換模組 45
6.1.3數位輸出訊號處理模組 46
6.2 軟體與系統設計 47
6.3 系統之製作與量測 48
6.3.1系統之製作 48
6.3.2系統之量測 48
6.4量測結果與討論 48
第七章 結論 50
參考文獻 52

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