本論文的第一個研究課題介紹一個適用於無線植入式裝置之新式無電容和無電阻ASK (Amplitude Shift Keying) 解調變器。習知ASK 解調變器的組成都包含一個以上的電容，而根據解調變的需求和積體電路的技術，它放置的位置可能在晶片內或以外掛的方式銲在PCB (Printed Circuit Board) 上。電容元件的使用違反植入式設計的小面積基本訴求，所以我們提出無被動元件的小型ASK 解調變器。針對先前的無電容的ASK 解調變器，增強其抗雜訊能力，進而能捨棄史密特觸發器和限流電阻，使得整個ASK 解調變器所使用的電晶體減少到12 顆。
本論文的第二個研究課題為低功率之二維旁通乘法器設計，係為一種以二維的旁通方法所設計的低功率數位乘法器。當乘法器中列 (row) 部份乘積或者行 (column) 乘積為零時，旁通元件將跳過多餘的計算單元以免會產生多餘的轉態訊號，因而節省功率消耗。這是一個兼具垂直與水平方向偵測是否為零之二維旁通設計。從佈局後模擬的結果看來，使用二維旁通的8×8 乘法器，比較傳統的陣列型8×8 乘法器約可以節省至少41%的功率消耗。

The first topic of this thesis is a C-less and R-less ASK (Amplitude Shift Keying) demodulator design for wireless implantable devices. Lots of prior ASK demodulators were composed of one or more capacitors which might be integrated in a chip or positioned off-chip on a PCB (Printed Circuit Board). The capacitor increases the area of the implantable system regardless of on-chip or off-chip, which violates the small-scale requirement for implanted
applications. Thus, this work proposes a miniature ASK demodulator without any passive elements, i.e., R or C. The noise margin of the envelope detector in the C-less ASK demodulator is enlarged such that any Schmitt trigger or current limiting resistor is no longer needed. It results in the number of transistors required for the ASK demodulator circuit is reduced to 12.
The second topic of this thesis is a design of a low-power 2-dimensional bypassing multiplier. The proposed bypassing cells constituting the multiplier skip redundant signal transitions when the horizontally (row) partial product or the vertically (column) operand is zero. Thorough post-layout simulations show that the power dissipation of the proposed design is reduced by more than 41% compared to the prior design with obscure penalty of delay and area.

目錄
摘要............................................................................................................. i
Abstract ...................................................................................................... ii
目錄........................................................................................................... iii
圖目錄....................................................................................................... vi
表目錄..................................................................................................... viii
第一章 簡介...............................................................................................1
1.1 論文動機.....................................................................................1
1.2 先前文獻探討.............................................................................3
1.2.1 相關ASK 解調變器的架構............................................3
1.2.2 低功率乘法器的架構......................................................5
1.3 論文大綱.....................................................................................6
第二章 適用於無線植入式裝置之新式無電容和無電阻ASK 解調變
器.................................................................................................................7
2.1 簡介..............................................................................................7
2.2 電路設計原理.............................................................................8
2.2.1 本設計之ASK 解調器的架構說明................................8
2.2.2 先前無電容ASK 解調變器電路的回顧........................9
iv
2.2.3 電路工作原理說明........................................................10
2.3 模擬結果...................................................................................14
2.3.1 模擬波形........................................................................14
2.3.2 預計規格與佈局圖........................................................17
2.3.3 規格比較........................................................................18
2.4 量測結果...................................................................................19
2.4.1 量測方法與量測儀器....................................................19
2.4.2 量測波形圖與晶片照相圖............................................20
2.4.3 量測後討論與電路改進................................................22
第三章 低功率之二維旁通乘法器........................................................24
3.1 簡介............................................................................................24
3.2 原理說明...................................................................................25
3.3 二維旁通架構與原理說明.......................................................31
3.3.1 二維旁通設計................................................................31
3.3.2 包含旁通邏輯的加法器單元........................................33
3.3.3 大型乘法器的骨牌效應................................................35
3.4 模擬結果...................................................................................37
3.4.1 模擬波形........................................................................37
3.4.2 預計規格與佈局圖........................................................38
v
3.4.3 規格比較........................................................................39
第四章 結論與相關成果........................................................................42
參考文獻...................................................................................................44

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