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博碩士論文 etd-0713104-153009 詳細資訊
Title page for etd-0713104-153009
論文名稱
Title
小變化之1 MHz時脈產生電路,高敏感度線性電壓對頻率轉換器,與適用於NTSC同步分離之高PSR偏壓電路
Low-Variation 1 MHz Clock Generator,High Sensitivity Linear Voltage-to-Frequency Converter,and High-PSR Bias Circuit for NTSC SYNC Separation
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
71
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2004-06-16
繳交日期
Date of Submission
2004-07-13
關鍵字
Keywords
時脈產生電路、NTSC同步分離、電壓對頻率轉換器、電源隔絕
NTSC SYNC separation, PSR, VFC, voltage-to-frequency converter, power supply rejection, clock generator
統計
Statistics
本論文已被瀏覽 5735 次,被下載 3685
The thesis/dissertation has been browsed 5735 times, has been downloaded 3685 times.
中文摘要
本論文包含三個主題,第一個主題是小變化之1 MHz時脈產生器。第二個主題是高敏感度線性電壓對頻率轉換器,第三個主題是適用於NTSC同步分離之高PSR偏壓電路。三者主要皆應用於消費性電子產品。
小變化之1 MHz時脈產生器內部設置一個自動對溫度補償的偏壓電路,並且沒有使用BJT或二極體等元件來實現,可以降低成本。補償的溫度範圍為0℃~90℃以內,頻率飄移在2.55%。
高敏感度線性電壓對頻率轉換器是利用視窗比較器的架構來實現[11]。主要對於其轉換精確度做分析以及改進,可以達到兼具精確度與敏感度高的特性。輸入電壓範圍0.1V~0.8V時,轉換精確度在1%,敏感度為84 KHz/V。
適用於NTSC同步分離之高PSR偏壓電路乃利用具回授控制的帶差參考電路來實現,目的在降低環境因素對於NTSC訊號解碼上的干擾。量測結果帶差參考電路對VDD飄移10%時的變化小於1%,而對溫度的敏感度為0.0006 V/℃。
Abstract
This thesis includes three topics. The first topic is a low-variation 1 MHz clock generator. The second one is a high sensitivity linear voltage-to-frequency converter. The last one is a high-PSR bias circuit for NTSC SYNC separation. All of the circuits can be applied to related consumer electronic products.
The low-variation 1 MHz clock generator includes a bias circuit which automatically compensates the drifting caused by temperature variations. Furthermore, the circuit contains neither BJTs nor diodes to reduce the area cost. The frequency variation is measured to be less than 2.55\% in the range of 0℃~90℃.
The high sensitivity linear voltage-to-frequency converter is mainly constructed by a window comparator[11]. We analyze and improve the performance of accuracy to achieve both high accuracy and high sensitivity. The accuracy error is less than 1% and sensitivity is 84 KHz/V in the voltage range of 0.1V~0.8V.
The high-PSR bias circuit for NTSC SYNC Separation is implemented by a bandgap reference which is controlled by a feedback loop to reduce the interference of the environment. The measurement variation of the bandgap reference is less than 1\% when the variation of power supply is 10\%. The sensitivity of the bandgap reference to temperature is measured to be 0.0006V/℃.
目次 Table of Contents
摘要 i
Abstract ii
第一章 簡介 1
1.1 論文動機............................................1
1.2 先前文獻探討........................................2
1.2.1 時脈產生器的溫度補償..............................2
1.2.2 電壓對頻率轉換器..................................3
1.2.3 適用於NTSC訊號同步分離之高PSR偏壓電路.............4
1.3 論文大綱............................................4
第二章 小變化之1 MHz時脈產生電路 6
2.1 概論................................................6
2.2 原理概述............................................7
2.3 架構與原理說明......................................7
2.3.1 環式震盪電路......................................7
2.3.2 偏壓電路..........................................9
2.3.3 設定參數與溫度分析...............................11
2.4 佈局考量...........................................12
2.4.1 雜訊考量.........................................12
2.4.2 測試考量.........................................13
2.5 電路的設計、模擬與量測.............................14
2.5.1 參數設計.........................................14
2.5.2 佈局前模擬結果...................................14
2.5.3 佈局後模擬結果...................................16
2.3.4 量測結果.........................................19
2.6 操作規格與比較.....................................23
2.6.1 預計規格與量測規格...............................23
2.3.3 晶片照相圖.......................................23
2.3.2 架構比較.........................................25
第三章 高靈敏度線性電壓對頻率轉換器 26
3.1 簡介...............................................26
3.2 原理概述...........................................27
3.3 電路架構與原理說明.................................28
3.3.1 電路架構.........................................28
3.3.2 精確度之討論.....................................29
3.3.3 參考電壓電路.....................................32
3.3.4 電壓電流轉換器...................................33
3.3.5 視窗比較器.......................................34
3.4 佈局考量...........................................36
3.4.1 雜訊考量.........................................36
3.4.2 測試考量.........................................37
3.5 電路的設計與模擬...................................38
3.5.1 佈局前模擬結果..............................38
3.6 操作規格與比較.....................................40
3.6.1 預計規格.........................................40
3.6.2 架構比較 .......................................41
第四章 適用於NTSC同步分離之高PSR偏壓電路大器 42
4.1 簡介...............................................42
4.2 原理概述...........................................42
4.3 電路設計與分析.....................................44
4.3.1 高PSR的帶差參考電路..............................44
4.3.2 PSR分析..........................................45
4.3.3 電壓調節電路.....................................46
4.4 電路的設計、模擬與量測.............................47
4.3.1 參數設計.........................................47
4.3.2 佈局後模擬結果...................................49
4.3.2 量測結果.........................................49
第五章 結論與成果 51
參考文獻 53
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