薄膜電晶體可廣泛的應用在各種高階顯示器中，由於顯示器的尺寸與解析度提升，增加對薄膜電晶體電性表現與穩定度的要求。金屬氧化物(Metal oxide-based, MOSs)薄膜電晶體(thin film transistor, TFT)可在室溫中製備，較低的漏電流與較高的電子遷移率將可分別降低顯示器的功率消耗與提升顯示器操作頻率，有機會取代傳統的非晶矽薄膜電晶體，成為下個世代的顯示器中主流之驅動元件。
本論文中使用接觸窗口(Via type)結構的氧化銦鎵鋅薄膜電晶體(a-IGZO TFTs)。a-IGZO TFTs雖有上述許多良好的優點，但其電性會受到長時間的電壓操作及照光而產生影響，我們藉由變動不同的結構去做可靠度以及照光的機制研究。首先我們將分析元件變動主動層的面積大小在大電流(High Current Stress)操作下的劣化機制，由於汲極電流產生的焦耳熱會加劇電子捕獲的現象。而隨著主動層面積的增加，反而增加更多電流路徑，導致焦耳熱更不易散失，因此元件將會有更明顯的劣化現象。針對a-IGZO對光的敏感度，固定Via位置也就是固定通道長度/寬度的前提下，但變動汲/源極長度，使得光源可正照在通道的不同位置。在正掃並且照UV光的條件下，靠近源極端的能障會因為電洞累積而降低，致使次臨界區域會有光漏電的情形發生。在反掃的情況下則會有背通道導通主導的漏電流情形發生。另外一方面，固定汲極與源極的位置但變動源極Via的位置，使源極金屬與主動區之接觸孔洞與閘極之間有一不重疊之區域(Offset)。實驗結果顯示，若當元件之源極金屬接觸孔洞與閘極之間有一Offset區域，元件之輸出電流特性將會隨著Offset之長度增加而呈現難以導通的情況。然而，當Offset區域照射紫外光(375 nm)時，由於大量載子的產生，可以使電流通過Offset區域，進而顯著增加汲極電流。此結構將能使金屬氧化物薄膜電晶體同時擁有紫外光感應能力，金屬氧化物薄膜電晶體在擁有優良的電流特性的同時，若電晶體同時可以擁有光感應特性，將可以作為UV感應器(UV sensor)整合在面板中，提升面板的附加價值。

In recent year, the large size and high pixel is need for variously advanced displays. Thus, the stable reliability and standard characteristic is most important for thin film transistor (TFT). The advantageous features of MOS (Metal oxide-based) TFTs are low temperature of fabrication, higher on/off current ratio, and higher electron mobility (> 10cm2/Vs). However, high mobility reduces power consumption and increase operation frequency. Due to the superior characteristics in amorphous metal oxide TFT, therefore, the amorphous metal oxide TFT is a very promising material for the display application in future.
We utilize inverted stagger a-IGZO TFTs with via type device. Although the a-IGZO TFT has many advantages, it is always suffer from the instability of illumination and long term bias stress due to oxygen vacancy and interface trap states. We varied different structure to discuss the mechanism under bias stress or illumination. First, we analyzed degradation of a-IGZO TFTs with fringe field (FF) structures by varying the area of active layer in width direction under high current stress (HCS). The degradation of devices can be attributed to the current-induced Joule heating phenomenon, causing a positive threshold voltage shift. The more voltage shift is associated with reduction of heat dissipation in IGZO with increased area of active layer. The second part is mainly the examination of a-IGZO TFT instability under front light illumination. The structure is varied from the extension of Metal2 (M2) and the light-exposure-length is defined from the source electrode along the length direction. The UV illumination induced electron-hole pair generation, with the subthreshold photo-leakage current resulting from the holes accumulation inducing source-side-barrier-lowering. In third part is varying from overlapped via-contact between gate and source/drain to non-overlapped via-contact (offset length) under UV back light. The on-current is decreased gradually with increasing source-offset length due to the increased uncontrollable offset region in dark. To use this difference of Id-Vg transfer characteristic curve before and after UV illumination, we design the UV sensor and it can be integrated in panel without changing the mask number and extra cost.

Content
誌謝 i
摘要 v
Abstract vii
Content ix
Figures caption xi
Table caption xv
Chapter 1 Introduction 1
1.1 Amorphous Metal Oxide Semiconductor Thin Film Transistors(AOS TFTs) 1
1.2 Origin of High Electron Mobility 2
1.3 Why Use α-IGZO 3
1.4 Motivation 4
Chapter 2 Device fabrication and electrical characterization 8
2.1 Device fabrication 8
2.2 Electrical characteristics 8
2.2.1 The I-V transfer characteristics 8
2.2.2 The C-V transfer characteristics 11
Chapter 3 Instruments and device parameter extraction 15
3.1 Instruments and measurement setup 15
3.1.1 Instruments 15
3.1.2 Set up instruments for I-V 16
3.2 Device parameter extraction 17
3.2.1 Determination of the threshold voltage 17
3.2.2 Determination of the field-effect mobility 17
3.2.3 Determination of the subthreshold swing 18
3.2.4 Determination of on/off current ratio 19
Chapter 4 Results and Discussion 22
4.1Instability of Electrical characteristics in IGZO TFTs with fringe field structures under High Current Stress (HCS) 22
4.1.1 IGZO TFT with fringe field effect 22
4.1.2 Analysis of Electrical characteristic under HCS for via-contact a-IGZO TFTs with fringe field structures 22
4.2 Amorphous In-Ga-Zn-O TFTs as an UV sensor by offset structure 29
4.2.1 Source-/Drain- offset structures 29
4.2.2 Analysis of Electrical characteristic for via-contact a-IGZO TFTs with source-/drain- offset structures 30
4.2.3 High Photo-response UV Sensor Based on Source-Offset In-Ga-Zn-O Thin Film Transistor 32
4.3 Asymmetric M2 of via type a-IGZO TFT under UV illumination 35
4.3.1 Asymmetric Metal2 structures 35
4.3.2 Forward sweep under UV illumination 35
4.3.3 Reverse sweep under UV illumination 38
Chapter 5 Conclusion 80
References: 82


Figures caption
Figure 1.2-1 Schematic orbital drawing of electron pathway in conventional compound semiconductor and ionic oxide semiconductors. 6
Figure1.2-2 (a) Amorphous formation and (b) electron transport properties of In2O3-Ga2O3-ZnO thin films. 7
Fig. 2.2.1-1 Basic ID-VD transfer curve of a-IGZO TFT. 13
Fig. 2.2.1-2 Basic NID-VG transfer curve of a-IGZO TFT. 13
Fig. 2.2.2-1 Basic C-V transfer curve of a-IGZO TFT 14
Fig. 3.1.1-1 Microscope, Hot chuck, Probe station. 20
Fig. 3.1.1-2 Agilent 4284A, Agilent 4156C, Agilent E5250A (Switch), Agilent 41501B. 20
Fig. 3.1.1-3 Temperature controller. 21
Fig. 3.1.1-4 The TTP-6 Probe Station. 21
Fig.4.1.1 the schematic cross-section diagram and bird’s-eye view of IGZO TFT with via type device structures 43
Fig.4.1.2-1 The HCS stressed ID-VG transfer curves under (a) linear region measurement and (b) saturation region measurement 44
Fig.4.1.2-2 The HCS stressed ID-VG transfer curves under (a) linear region measurement and (b) saturation region measurement with Source/Drain interchange measurement 45
Fig.4.1.2-3 The HCS stressed ID-VG transfer curves under (a) standard measurement and (b) Source/Drain interchange measurement with linear and saturation region (c) Schematic diagram of electric injection location 46
Fig.4.1.2-4 The characteristic curves of (a) CGS and (b) CGD after HCS, (c) The schematic band diagram after HCS 47
Fig.4.1.2-5 (a) Optical microscopic image of thin-film transistor (b)Thermal distribution under various gate and drain voltage (c) Two-dimensional image of thermal distribution with stress voltage of Vg=Vd=30V 48
Fig.4.1.2-6 (a) The characteristic curves of CGS (b) the schematic energy band diagram for electron trapping 49
Fig.4.1.2-7 The HCS stressed ID-VG transfer curves with (a) W/L =20/10 μm and (b) W/L =80/10 μm 50
Fig.4.1.2-8 (a) Time dependence Vt shift with various width (b) schematic of heat dissipation 51
Fig.4.1.2-9 the device of 16μm under HCS (a) ID-VG transfer curves under standard measurement (a) ID-VG transfer curves under Source/Drain interchange measurement (c) Time dependence Vt shift with various side length 52
Fig.4.1.2-10 (a) schematic of heat dissipation with different side length (b) Side length dependence Vt shift 53
Fig.4.1.2-11 schematic of fixed drain current but varied side length (a) W=20μm, side length=16μm (b) W=40μm, side length=6μm (c) Vt shift dependence stress time in these TFT 54
Fig.4.2.1-1 OM of bird’s-eye view of IGZO TFT with via type device structures 55
Fig.4.2.2-1 ID-VG transfer curves under dark measurement with 0-μm-drian-offset 55
Fig.4.2.2-2(a) ID-VG transfer curves under dark measurement with 4-μm-drian-offset (b) schematic of band diagram in standard and S/D interchange measurement 56
Fig.4.2.2-3 ID-VG transfer curves by varying drain-offset in linear region 57
Fig.4.2.2-4 ID-VG transfer curves by varying drain-offset in saturation 57
Fig.4.2.2-5 fitting line of total resistance 58
Fig.4.2.2-6 ID-VG transfer curves by varying source-offset in Vd=20V 58
Fig.4.2.3-1 ID-VG transfer curves with 8-μm-source-offset under red illumination 59
Fig.4.2.3-2 ID-VG transfer curves with 8-μm-source-offset under green illumination 60
Fig.4.2.3-3 ID-VG transfer curves with 8-μm-source-offset under blue illumination 60
Fig.4.2.3-4 schematic of 8-μm-source-offset with generated carrier 61
Fig4.2.3-5 ID-VG transfer curves with 8-μm-source-offset under UV illumination 61
Fig.4.2.3-6 ID-VG transfer curves with 8-μm-drain-offset under UV illumination 62
Fig.4.2.3-7 Schematic of band diagram of source barrier lowing 62
Fig.4.2.3-8 ID-VG transfer curves with 3-μm-overlapped in blue/UV illumination 63
Fig.4.2.3-9 ID-VG transfer curves with 8-μm-source-offset in blue/UV illumination 63
Fig.4.2.3-10 the on/off radio of drain current under blue light 64
Fig.4.2.3-11 the on/off radio of drain current under UV light 65
Fig.4.3.1-1 (a) the schematic bird’s-eye view of IGZO TFT with via-type device structures (b) cross-section diagram of device 66
Fig.4.3.2-1 ID-VG transfer curves under saturation region measurement for different structure. 66
Fig.4.3.2-2 ID-VG transfer curves with 10μm-source-exposure-length structure under various light (a) in at linear region (b) in saturation region 67
Fg.4.3.2-3 ID-VG transfer curves with 10μm-source-exposure-length under various light (a) in linear region (a) in saturation region with S/D interchanged 68
Fig.4.3.2-4 ID-VG transfer curves with 40μm-exposure-length structure under various light (a) in linear region (b) in saturation region 69
Fig.4.3.2-5 ID-VG transfer curves with 40μm-exposure-length under various light (a) in linear region (a) in saturation region with S/D interchanged 70
Fig.4.3.2-6 Light-exposure- length vs drain current (a) standard measurement (b) S/D interchanged measurement 71
Fig.4.3.2-7 Schematic of band diagram for source barrier lowing 72
Fig.4.3.3-1 ID-VG transfer curves with 10μm-source-exposure-length structure under UV illumination in linear region 73
Fig.4.3.3-2 ID-VG transfer curves of device with 10μm-source-exposured-length structure under UV illumination in saturation region 73
Fig.4.3.3-3 ID-VG transfer curves under forward sweep with different drain bias when the device is exposed by UV light at source side. 74
Fig.4.3.3-4 ID-VG transfer curves under backward sweep with different drain bias when the device is exposed by UV light at source side. 74
Fig.4.3.3-6 ID-VG transfer curves under forward or backward sweep with different drain bias when the device is exposed by UV illumination at whole channel 75
Fig.4.3.3-7 Extracting the drain current of device with source side-exposed UV light when the gate bias reaches -5 V. 76
Fig.4.3.3-8 Extracting the drain current of device with drain side-exposed UV light at side when the gate bias reaches -5 V. 76
Fig.4.3.3-9 ID-VG transfer curves with different channel width from 8μm to 80μm under UV illumination 77
Fig.4.3.3-10 Extracted the drain current for device with different light exposure length at Vg = -10V with varied drain voltage 77
Fig.4.3.3-11(a) ID-VG transfer curves with different ND (b) Current density distribution at Vgs= -10V when ND=10-17 cm-3. Band profile of TFTs with (c)d=200nm. The QFL is close to the conduction band edge even when high negative voltage is applied to gate electrode for d=200nm 78
Fig.4.3.3-12 Schematic of vertical band diagram for device under illumination. 78
Fig.4.3.3-13(a) We analyze the energy band diagram of the cross section A to A’ and (b) the back channel of the cross section B to B’.(c) the front channel of the cross section C to C’ 79


Table caption
Table 1.1-1 The comparison of α-Si, poly-Si and amorphous oxide TFTs. 6

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