由於全球行動通訊系統市場的蓬勃發展以及無線多媒體資訊交流的急遽增加，第三代(3G)行動通訊系統已不足以滿足大眾對資訊傳輸的要求，故第四代(4G)行動通訊系統(Long Term Evolution, LTE)必須具備更高的傳輸頻寬、更低的延遲時間與更快的傳輸速率等特性。為了達到上述需求，LTE提供高達100 Mbps之資料傳輸率，可有效縮短資訊交流時間；然而，目前應用於4G行動通訊系統之全頻帶接收機晶片，需消耗較大功率以提供足夠之轉換增益。因此本論文運用CMOS製程開發一種同時兼具全頻帶(0.5~2.8 GHz)、高轉換增益(≥15 dB)、高線性度(≥-10 dBm)、低輸入反射損耗(≤-15 dB)、低雜訊指數(≤10 dB)與低功率消耗(≤40 mW)等特性之寬頻接收機，以應用於4G行動通訊系統之相關產品。

本論文所開發之接收機架構主要可分為低雜訊放大器(Low Noise Amplifier, LNA)、可變增益放大器(Variable Gain Amplifier, VGA)與混頻器(Mixer)。在LNA之設計中，採用反相器架構以提升增益與降低功率消耗，並利用電阻回授技術達到寬頻特性。而在Mixer設計中，採用源極退化技術與一階低通濾波負載以提升整體接收機線性度與抑止高頻訊號通過，進而改善隔離度。最後，本論文所設計之接收機架構引入VGA達到增益可變之效果，避免整體接收機產生飽和現象。

本論文所開發之接收機其操作頻率為0.5~2.8 GHz，晶片尺寸為1.2×1.0 mm2。經由量測結果顯示，該接收機轉換增益(Conversion Gain, CG)高達31.2 dB，且線性度(Input third-order Intercept Point, IIP3)僅為-6.1 dBm。另一方面，該接收機電路之輸入反射損耗(Input Return Loss, IRL)僅為-17.2~-20.1 dB；同時具有-72 dB之高反向隔離度(Reverse Isolation)以及4.2~9.6dB之低雜訊(Noise Figure, NF)等特性。最後，本論文所開發之晶片在1.8 V之偏壓下，其功率消耗僅僅只有20 mW。綜合以上所量測之諸多特優良特性，證明本論文所開發之寬頻接收機電路非常適合應用於4G行動通訊系統中。

Since the global mobile communication systems and the wireless multimedia markets are increasing rapidly, various innovative electronic devices or circuits with higher transmission bandwidth, lower delay time and high-speed data rate are developed for matching the requirements of the new-generation global mobile communication products (Long Term Evolution, LTE). However, for providing higher power conversion gain, the new-generation receiver chip will consume larger power than that of 3G products. In this thesis, a wide-band (0.5~2.8 GHz) front-end receiver with high power conversion gain (≥ 15 dB), high linearity (≥ -10 dBm), low input insertion loss (≤ -15 dB), low noise figure (≤ 10 dB) and low power consumption (≤ 40 mW) are developed utilizing TSMC 0.18 μm CMOS technology and which can be used in 4G mobile network system.

The proposed receiver chip is including a low noise amplifier (LNA), a variable gain amplifier (VGA) and a down-conversion mixer. The conversion gain, power consumption and bandwidth of the receiver can be improved by using self-biasing inverter and feedback resistor architectures. In addition, a source degeneration technique and RC-tank load are adopted in the proposed mixer to enhance the linearity and suppress high frequency signal, respectively.

The chip size and operation frequency of the implemented receiver were 1.2 × 1.0 mm2 and 0.5~2.8 GHz, respectively. Under the optimized conditions, a high conversion gain (31.2 dB), high linearity (the Input third-order Intercept Point, IIP3 =-6.1 dBm), low input return loss (-20.1 dB), high reverse isolation (-72 dB) and low noise figure ranges (4.2 dB) and low power consumption (20 mW, at 1.8 V supply voltage) of the presented receiver chip can be demonstrated in this research and such characteristics are well suitable for 4G mobile communications system applications.

目錄
論文審定書 ................................ ................................ ................................ ....................... i
誌謝 ................................ ................................ ................................ ................................ . iii
摘要 ................................ ................................ ................................ ................................ . iv
Abstract Abstract ................................ ................................ ................................ ............................. v
目錄 ................................ ................................ ................................ ................................ vii
圖目錄 ................................ ................................ ................................ ............................. ix
表目錄 ................................ ................................ ................................ ............................. xi
第一章 緒論 ................................ ................................ ................................ .................... 1
1.1 研究背景 ................................ ................................ ................................ ............. 1
1.1 .1 行動通訊系統之簡介 ................................ ................................ ................ 1
1.1.2 射頻前端接收機架構之概述 ................................ ................................ .... 3
1.2 研究動機 ................................ ................................ ................................ ............. 5
1.3 論文架構 ................................ ................................ ................................ ............. 7
第二章 前端接收機之重要性能參 數 ................................ ................................ ............ 8
2.1 散射參數 ................................ ................................ ................................ ............. 8
2.2 轉換功率增益 ................................ ................................ ................................ .... 11
2.3 穩定度 ................................ ................................ ................................ ............... 13
2.4 雜訊 ................................ ................................ ................................ ................... 14
2.5 線性度 ................................ ................................ ................................ ............... 17
第三章 前端接收機之設計 ................................ ................................ .......................... 21
3.1 應用於 4G 行動網路系統之前端接收機設計 ................................ ................ 21
3.1.1 低雜訊放大器分析 ................................ ................................ .................. 23
3.1.2 可變增益放大器分析 ................................ ................................ .............. 29
3.1.3 混頻器分析 ................................ ................................ .............................. 32
viii
3.1.4 整體機收電路分析總結 ................................ ................................ ...... 39
3.2 設計流程 ................................ ................................ ................................ ........... 40
第四章 結果與討論 ................................ ................................ ................................ ...... 41
4.1 電路佈局設計 ................................ ................................ ................................ .... 41
4.2 量 測考................................ ................................ ................................ ............ 43
4.3 模擬與量測結果 ................................ ................................ ................................ 46
4.3.1 本論文 4G 行動網路接收機之模擬與量測結果 ................................ ... 46
4.3.2 本論文與國內外研發成果之比較 ................................ .......................... 52
第五章 結論與未來展望 ................................ ................................ .............................. 53
5.1 結論 ................................ ................................ ................................ ................... 53
5.2 未來展望 ................................ ................................ ................................ ........... 55
參考文獻 ................................ ................................ ................................ ........................ 56

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