IEEE802.15.4低速率無線近身網路具有低功率消耗、低成本和可靠的資料傳送等特性，傳輸距離可達數十公尺。主要應用於工廠或家庭的安全監控和各種感測裝置，如自動照明感測器、遙控器和溫度感測器等，這些裝置都可放置於空間上的任何地方。

在本論文中，我們將IEEE802.15.4低速率無線近身網路中818/915MHz模式之基頻訊號處理與電路設計實現出來。系統設計過程中包含演算法設計、系統模擬、FPGA實現和系統實測。其中在接收機的演算法設計上，包括封包偵測、相位對應、頻率偏移估測、能量偵測、同步、解展頻和差分解碼等，在論文中都有詳細的說明。演算法設計完成經系統模擬達到標準要求後，即將演算法撰寫成Verilog硬體描述語言（Verilog Hardware Description Language, VHDL)的形式，並依據硬體設計流程逐一驗證每個環節是否正確，如Behavioral模擬和Gate level模擬，當這些程序都正確後，最後將程式下載到FPGA上並進行測試與驗證工作。

在驗證的過程中，先用Matlab產生傳送端經過通道之訊號，訊號中包含了閒置（idle)訊號、初始相位、頻率偏移和雜訊等影響。其中頻率偏移是由於傳送端和接收端的震盪器不匹配所造成。接著把傳送端經過通道之訊號存入邏輯分析儀並將此訊號輸入到FPGA上，藉由邏輯分析儀觀察解回來之訊號是否和預設的傳送訊號相同，透過這樣的方式，最後完成適用於低速率無線近身網路基頻電路的研製。

The IEEE802.15.4 Low Rate-Wireless Personal Area Network (LR-WLAN) is characterized by its low power consumption, low cost, and reliable data transfer. LR-WPAN can be used for security monitoring, by automatically setting various sensors which can be placed anywhere in the factory or home.

This work implements baseband signal processing and circuit design for the 868/915MHz mode of the IEEE802.15.4 LR-WPAN. The development processes include algorithm design, system simulation, FPGA implementation and system measurements. The receiver algorithm includes packet detection, phase mapping, frequency offset estimation, energy detection, synchronization, despreading and differential decoding. All algorithms are completely described herein. The system simulation match the required specifications after running the algorithms. Additionally, algorithms are composed by the Verilog Hardware Description Language (VHDL) form. The process is designed according to the hardware to identify exactly each link .

The simulations performed in this work include behavioral simulation and gate level simulation. Finally, the program is uploaded to the FPGA to verify results of the procedures is verified by Matlab, by determining the effects of transmission on the channel signal, including idle signals, initial phase, frequency offset and noise. The frequency offset arises when the oscillators of the transmitter and receiver do not match. The transmitter signal from the logic analyzer is then input to the FPGA. The signal sent from the logic analyzer is tested to determine whether it retains the original transmission signal homology. Finally, a LR-WPAN baseband circuit is successfully developed through by the above procedures.

第一章 序論
第二章 IEEE802.15.4通訊協定概述
第三章 868M/915MHz模式中之演算法設計
第四章 硬體電路架構
第五章 模擬與量測結果
第六章 結論

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[4] Evans-Pughe, C., “Bzzzz zzz [ZigBee wireless standard],” IEE Review, Vol.49, Issue 3, pp.28-31, March 2003.

[5] IEEE802.15.4 WPAN Task Group 4(TG4), 2003, URL:
http://ieee802.org/15/pub/TG4.html

[6] ZigBee Alliance, 2003, URL:
http://www.zigbee.org/en/index.asp