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博碩士論文 etd-0714105-164338 詳細資訊
Title page for etd-0714105-164338
論文名稱
Title
低雜訊高功率效率自我震盪功率放大器
A Low Distortion and High Power Efficiency Self-Oscillating Switching Power Amplifier
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
59
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2005-06-28
繳交日期
Date of Submission
2005-07-14
關鍵字
Keywords
D 類功率放大器、雜訊整形、切換式功率放大器、自我震盪功率放大器
Switch Power Amplifier, Class D Power Amplifier, Noise Shaping, SOPA
統計
Statistics
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The thesis/dissertation has been browsed 5719 times, has been downloaded 0 times.
中文摘要
在這個低雜訊高效率自我震盪功率放大器的設計中,我們使用TSMC 0.35µm ,2P4M CMOS的製程技術,在這個設計中我們採用noise shaping的方法來降低THD (Total Harmonic Distortion),這種創新的設計可應用於助聽器方面,配合助聽器的規格,使用1.5V的低電壓。
模擬結果顯示了此電路可達0.0751%的THD和90.1%的功率效率。測量結果顯示了此電路可達到0.25%的THD和89.7%的功率效率,此結果顯示了此電路在THD和功率效率上表現良好,適合用於低雜訊高效率和低電壓方面的電路設計,也適用於助聽器驅動器的新應用。
Abstract
The design of a low distortion and high efficiency self-oscillating power amplifier is presented. It is designed using TSMC 0.35µm, 2p4m CMOS technology. We use noise shaping to reduce the THD (Total Harmonic Distortion). This design can be applied to hearing aids. The supply voltage is 1.5V for hearing aids.

Experimental results demonstrate that the proposed amplifier has the total harmonic distortion (THD) of 0.0751% and power efficiency around 90.1%. Measurement result reveals that this circuit can be up to 0.25% of the THD and 89.7% of the power efficiency. This result shows that the proposed power amplifier has superior performance in THD and power efficiency, and this circuit is applicable to low-distortion, high-efficiency, and low-voltage applications, such as the hearing aids.
目次 Table of Contents
Abstract
Chapter 1 Introduction
1.1Background and History
1.2 Motivation and Review
1.3 Problem and Purpose
1.4 Thesis Organization
Chapter 2 Switching Power Amplifiers
2.1 Figure of Merit of Power Amplifier
2.1.1 Harmonic Distortion
2.1.2 Power Efficiency
2.2 Switching Power Amplifier
2.2.1 Class D Amplifier
2.2.2 Class AD Amplifier
2.3 Summary of Switching Power Amplifiers
Chapter 3 The Proposed Circuit
3.1 Ring Oscillator Based PWM
3.1.1 Ring Oscillator
3.1.2 Self-Oscillating PWM Circuit
3.2 Self-Oscillator Power Amplifier with Noise Shaping
3.2.1 Noise Shaping
3.2.2 The Self-Oscillating Switching Power Amplifier
3.2.3 Self-Oscillating Modulator
3.2.4 Output Stage
Chapter 4 Simulation Results and Measured Results
4.1 Simulation Results
4.2 Layouts and Measured Results
Chapter 5 Conclusion
References
Appendix A
參考文獻 References
Reference
[1] M.T. Tan, J.S. Chang and Y.C. Tong, “A Novel Self-Tuning Pulse Width Modulator Based on Master-Slave Architecture for a Class D Amplifier.”, IEEE,1999 CDMA tertbed”, Proceedings of the 2000 International Symposium, Low Power Electronics and Design, pp.222-224, 2000
[2] T. Piessens and M. Steyaert “Highly efficient xDSL line drivers in 0.35 µm CMOS using a self-oscillating power amplifier”, IEEE Journal of Solid-State Circuits (JSSC), vol.38, No.1, pp.22-29, January 2003.
[3] Nam-Sung Jung, Nam-In Kim and Gyu-Hyeong Cho, “A new high-efficiency and super-fidelity analog audio amplifier with the aid of digital switching amplifier: class K amplifier”, Power Electronics Specialists Conference, vol.1,pp.17-22, 1998.
[4] A.E. Ginart, R.M. Bass, W.M. Leach, Jr., and T.G. Habetler, “Analysis of the class AD audio amplifier including hysteresis effects”, IEEE Power Electronics, vol.18,pp.679-685, 2003.
[5] D. Dapkus, “Class-D audio power amplifiers: an overview “, IEEE Consumer Electronics,
pp.400 – 401, 2000.
[6] Dallas Maxim, “Class D audio amplifier output filter optimization”, www.maxim-ic.com/an624
, Apr.
[7] J.S. Chang, Meng-Tong Tan, Zhihong Cheng and Yit-Chow Tong, “ Analysis and design of power efficient class D amplifier output stages ”, IEEE Circuits and Systems I, vol.47,pp.897-902, 2000.
[8] R. Jacob Baker, Harry W. Li and David E. Boyce, “CMOS Circuit Design, Layout, and Simulation,” The Institute of Electrical and Electronics Engineers, Inc., New York, pp.201-285.
[9] M.C.Killion and G.Village, “Class D hearing aid amp”, US Patent No.4, 689, 819, 1987.
[10] Soo-Chang Choi, Jun-Woo Lee, Woo-Kang Jin, Jae-Hwan So and Suki Kim, “A design of a 10-W single-chip class D audio amplifier with very high efficiency using CMOS technology”, IEEE Consumer Electronics, vol.45, pp.465-473, 1999.

[11] M.T. Tan, J.S. Chang, Z.H. Chang Y.C. Tong, “A novel self-error correction pulse width modulator for a class D amplifier for hearing instruments,” Circuits and Systems, 1998. ISCAS ’98.
Proceeding of the 1998 IEEE International Symposium on, Volume: 1, 31 May-3 June 1998.
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