在本論文中，我們提出一個新穎性之具有抬高本體且蕭特基接觸的源極和汲極 (Schottky Contact S/D)的無摻雜及無電容式單電晶體動態隨機存取記憶體(Doping-Less One-Transistor Dynamic Random Access Memory, DL 1T-DRAM)之架構。無摻雜式元件最大的好處是不需額外離子佈植(Ion Implantation)能免除一些問題，例如:隨機摻雜擾動(Random Dopant Fluctuations)和熱預算(Thermal Budget)。藉由蕭特基能障(Schottky barrier)形成源極和汲極區域，而利用熱離子放射(thermionic emission)產生出額外的電子或電洞，可用於nMOS或pMOS。
根據模擬結果顯示，在我們元件的閘極長度(Gate Length)為10 nm時，可程式規劃窗(Programming Window)為28.7 µA/um與資料保存時間(Retention Time)在室溫可達到466 ms而在高溫85 °C也可達到79 ms。然而元件在低偏壓操作下，寫入速度仍然可達到4奈秒，我們探討了各個記憶體操作狀態下的功率消耗。而更進一步研究在閘極不同功函數下功率消耗的表現，透過功函數偏移降低操作電流達成低功率消耗的應用。在我們所設計元件在未來物聯網(IoT)時代能符合低功耗應用的趨勢。

In this thesis, we propose a novel structure of Doping-less 1T-DRAM with raised body and Schottky contact S/D. As the device has not any physical doping, it is expected to be free from problems associated with random dopant fluctuations and thermal budget. The source and drain regions are formed by the Schottky barrier which uses mechanism of thermionic emission that generates additional electrons and holes for nMOS and pMOS respectively. Our simulation results show that programming window is 28.7 µA/um at gate length of 10 nm with the retention time of 466 ms at 27 °C and 79 ms at 85 °C can be achieved for our doping-less 1T-DRAM. In addition, low operating biases can result in a short of programming time of 4 ns. Furthermore, we research the performance of different gate work function and work function shift can be achieved for low power application in the nearest future.

中文審定書 i
英文審定書 ii
致謝 iii
摘要 iv
Abstract v
Contents vi
List of Figures ix
List of Tables xii
Chapter 1 Introduction 1
1.1 Background 1
1.2 Motivation 5
Chapter 2 Principle of Operation 7
2.1 Floating Body Effect 7
2.2 Mechanism of Writing of 1T-DRAM 9
2.2.1 Mechanism of Impact Ionization 9
2.2.2 Mechanism of GIDL 11
Chapter 3 Device Design and Fabrication 13
3.1 Process Flow of the Device 13
Chapter 4 Results and Discussion 16
4.1 Models of Physical Mechanism 16
4.2 The structure of Doping-less 1T-DRAM 16
4.3 Operation of Doping-less 1T-DRAM 19
4.4 I-V Characteristics 21
4.5 Programming Window 23
4.6 Retention Time 24
4.7 S/D Metal Materials with Schottky Barrier Contact 25
4.8 Write Time 27
4.9 Influence of Temperature 29
4.10 Power Consumption 30
4.11 Disturbance Immunity 34
4.12 Scalability 36
4.13 Benchmark 38
Chapter 5 Conclusion and Future Work 40
5.1 Conclusion 40
5.2 Future Work 42
Reference 43
Appendix 57

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