矽晶基板占太陽電池成本有一定的比重，薄型化是矽晶太陽電池在追求發電效率外另一重點目標。未來的超薄型矽晶片(10~50μm)將因本身光吸收係數較低且非直接能隙的材料特性，而無法有效吸收入射光。對此，本研究提出一種新型且可用低溫製程製作的元件結構設計，即結合超薄矽晶與銅銦鎵硒化合物半導體形成：p-CuGaSe2/n-Si異質接面並在矽晶背面接合n-CuInSe2以促進光吸收量。藉由光輔助分子束磊晶法已驗證CuGaSe2 (簡稱CGS)和CuInSe2 (簡稱CIS)可在300℃磊晶成長於(001)GaAs基板上，而在此一元件結構中。矽與銅銦鎵硒化合物之晶格常數差異更大，CGS/Si和Si/CIS界面差排的數量導致載子複合速率分別高達1.7x10^5 cm/sec和4.3x10^5cm/sec。
為排除介面缺陷的影響，可利用凡德瓦爾磊晶法(Van der Waals Epitaxy)分別置入具二維結構的GaSe和InSe半導體薄層於CGS/Si和Si/CIS界面。我們使用PC1D一維太陽電池模擬軟體，代入文獻搜尋所獲得各材料光性和電性之實測數據，探討矽與銅銦鎵硒化合物界面間加入二維材料膜層後元件發電特性的改善情形，並應用Taguchi法進行元件優化。我們發現原先的元件結構p-CGS(900nm, doping conc.1x10^17atoms/cm3)/ n-Si(10um, doping conc. 1.56x10^15atoms/cm3) /n-CIS(500nm, doping conc. 1x10^17atoms/cm3)其發電效率為22.1%，開路電壓0.743V，短路電流0.040A，填充因子73.82%；界面改質後，元件結構p-CGS(900nm, doping conc.1x10^17atoms/cm3)/GaSe(15nm, doping conc. 2.2x10^15atoms/cm3)/n-Si(10um, doping conc. 1.56x10^15atoms/cm3)/InSe(15nm, doping conc.1x10^16 atoms/cm3)/n-CIS(500nm, doping conc. 1x10^17atoms/cm3)其元件發電效率可達27.3%，開路電壓0.858V，短路電流0.037A，填充因子84.09%。GaSe的置入顯著降低載子複合速率，使得開路電壓上升。而後方InSe的置入則在元件能帶結構的導帶和價帶不連續位置分別產生高低不一的能障，在CIS中產生的電洞因InSe價帶形成之能障而聚集於此，使矽基板的電子欲經過InSe時會與電洞複合。因此在矽基板減薄而降低光吸收時，CIS光吸收量的增加，使更多電子在CIS產生並直接導出電池，而助於轉換效率提升。

Next generation Si solar cell under development will consider to use ultra-thin wafers with 5~50µm in thickness for the reduction of material cost and the flexibility to be integrated in the building design. However, the challenge is to develop an effective light trapping technology for the poor optical absorber such as Si. In this work, we propose a novel device structure using p-type CuGaSe2 (CGS) to form a heterojunction with n-type Si and adding a n-type CuInSe2 (CIS) layer, whose optical absorption coefficient as high as 10^-5 cm-1, at the bottom of Si wafer. An additional advantage for this heterostructure is the capability to fabricate the whole device at a temperature as low as 300oC. There is a major concern on large lattice mismatch at the CGS/Si and Si/CIS interfaces, the corresponding carrier recombination velocities reach 1.7x10^5 and 4.34x10^5 cm/sec, respectively. Van der Waals epitaxy with inserting a 2D semiconducting material, such as GaSe or InSe, at CGS/Si and Si/CIS interfaces could prohibit the formation of misfit dislocations. PC-1D simulation tool for solar cells is used along with the experimental data of material properties acquired from the literature survey to explore our device performance. In addition, Taguchi method is applied for device optimization. Our simulation results show that the energy conversion efficiency of p-CGS(900nm, doping conc.1x10^17atoms/cm3)/ n-Si(10um, doping conc. 1.56x10^15atoms/cm3) /n-CIS(500nm, doping conc. 1x10^17atoms/cm3) without interface modification may reach 22.1% (Voc=0.743V, Isc=40mA, FF=73.8) after optimizing the device parameters. The cell efficiency increases to 27.3% (Voc=0.858V, Isc=37mA, FF=84.1) with the device structure of p-CGS(900nm, doping conc.1x10^17atoms/cm3)/GaSe(15nm, doping conc. 2.2x10^15atoms/cm3)/n-Si(10um, doping conc. 1.56x10^15atoms/cm3)/InSe(15nm, doping conc.1x10^16 atoms/cm3)/n-CIS(500nm, doping conc. 1x10^17atoms/cm3)

論文審定書 i
摘要 ii
Abstract iv
目錄 v
圖目錄 vii
表目錄 x
第一章、緒論 1
1.1 簡介 1
1.2 研究動機與目的 3
第二章、文獻回顧 5
2.1 CuGaSe2之材料性質 5
2.1.1 CuGaSe2之光電性質及晶體結構 5
2.1.2 CuGaSe2之本質點缺陷 9
2.1.3 CuGaSe2之薄膜製程技術 11
2.2 CuGaSe2/Si異質接面及磊晶法 13
2.2.1能帶結構 13
2.2.2凡德瓦爾磊晶法 17
第三章、模擬軟體之物理模型 19
3.1 PC1D使用的物理模型 20
3.1.1載子傳輸 20
3.1.2載子分佈統計 21
3.1.3連續方程式 22
3.1.4波松方程式 23
3.2 PC1D內所使用的參數 24
3.2.1折射率、光吸收係數及反射率 24
3.2.2自由載子吸收 26
3.2.3能帶結構 27
3.2.4能帶窄化 28
3.2.5遷移率 30
3.2.6載子復合模型 32
3.2.7未完全游離的摻雜 34
3.3 PC1D功能驗證 35
第四章、材料參數設定及選用 37
4.1 CuGaSe2/Si膜層厚度考量 38
4.2 Si參數設定及選用 43
4.3 CuGaSe2參數設定及選用 45
4.4 GaSe、InSe參數設定及選用 51
4.5 CuInSe2參數設定及選用 57
第五章、模擬結果分析 59
5.1 CuGaSe2 / Si / CuInSe2 結構 59
5.2 CuGaSe2 / GaSe / Si / CuInSe2 結構 65
5.3 CuGaSe2 / GaSe / Si / InSe /CuInSe2 結構 69
第六章、結論 84
參考資料 85

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