傳統的非揮發性記憶體是利用複晶矽浮停閘(floating gate)作為載子儲存的單元，而在元件尺寸持續微縮下，此結構將面臨一些瓶頸。為了克服尺寸極限，近年來衍生出之奈米晶體非揮發性記憶體，即利用半導體或金屬奈米點作為電荷儲存的單元，可以減少穿隧氧化層的厚度，而不損失可靠性，進而降低操作電壓及操作速度增快。
在此論文中，將從鎢(W)金屬奈米點的製作方式出發，首先在穿隧氧化層上方沉積矽化鎢(W5Si3)薄膜，當試片經過高溫熱氧化後，金屬鎢成分會向下在靠近穿隧氧化層附近成核析出形成鎢奈米點，同時，成份矽則氧化成二氧化矽而將鎢奈米點包圍，使成為各自獨立的儲存單元。此外，在矽化鎢薄膜製備的過程中，通入載氣(O2或N2)，研究鎢金屬奈米點在不同的介電層環境中的記憶效應以及可靠度分析。同時，本論文也討論額外的氧化矽薄膜沉積在矽化鎢表面對鎢金屬奈米點的形成機制，可以改善熱氧化的控制能力。厚的氧化矽薄膜可以有效地控制熱氧化條件，並且防止熱氧化造成的薄膜劣化。然而，過度的熱氧化會造成記憶窗口下降以及電性劣化，主要是因為部份的鎢金屬奈米點被氧化成含有金屬的介電材料。相比之下，我們亦將直接以同時濺鍍鎢及介電材料如二氧化矽(SiO2)或氮化矽(Si3N4)沉積載子儲存層的方式來形成鎢奈米點包圍在介電層中的結構做論述。再者，為調變鎢及矽兩者成份含量比例而直接由同時濺鍍沉積的製作也將於此論文中加以研究。此外，我們也針對鍺成份加入矽化鎢薄膜，對後續鎢金屬奈米點的記憶窗口以及電性做討論。
總之，由以上的鎢金屬奈米點的製作過程，我們可以得到不同的介電層對傳統的鎢金屬奈米點記憶體的影響、額外的氧化層對熱處理的影響、以及鍺成份對記憶效應的貢獻。

In a conventional nonvolatile memory (NVM), charge is stored in a ploy-silicon floating gate (FG) surrounded by dielectrics. But, it will suffer some limitations for continued scaling of the device structure. Therefore, the nanocrystal nonvolatile memory devices have been investigated to overcome the limit of the conventional floating gate NVM in recently years. Nanocrystal charge storage offers several advantages, the main one being the potential to use thinner tunnel oxide without sacrificing nonvolatility. This is a quite attractive proposition since reducing the tunnel oxide thickness is a key to lowering operating voltage and/or increasing operating speeds.
In this thesis, we have fabricated tungsten (W) nanocrystals nonvolatile memory devices. A thin tungsten silicide (W5Si3) layer was deposited on tunnel oxide layer first. The following oxidation was performed in furnace system. The W element tends to segregate downward and precipitate on the tunnel oxide after thermal oxidation. In addition, the silicon element is oxidized into silicon dioxide surrounded tungsten nanocrystals. Also, the carrier gas, such as O2 and N2, were also added as the tungsten silicide deposition. The memory effect and the electrical reliability for W nanocrystals surrounded in different dielectric were also investigated in this study. In addition, the formation mechanism of W nanocrystals with additional silicon oxide capped on tungsten silicide was also investigated. The thicker silicon oxide can effectively control the thermal oxidation condition and prevent thin film degradation. However, the overall oxidation cause the memory window reduction and the electrical characteristics degradation, resulted from the partially oxidation of W nanocrystal to metal-incorporated dielectric. By contrast, we also demonstrated the structure that deposited the charge trapping layer by co-sputtered W and dielectric material as SiO2 or Si3N4 to directly form the W nanocrystal embedded in dielectrics. Besides, the W and Si directly deposited by co-sputtered to adjust the two elements contained ratio had investigated as well in this study. Furthermore, the memory effect and electrical characteristics for germanium (Ge) element incorporated W nanocrystal memory were also discussed. The additional storage element contributes the memory effect.
In summary, the memory effect for W nanaocrystal embedded in different dielectric, the effect of the thermal treatment for additional silicon oxide incorporation, and the contribution of the Ge element to the memory effect can be obtained from the fabrication of W nanocrystal memory were finished in this study.

Chapter 1 Introduction
1.1General Background -------------- 1
1.1.1SONOS Nonvolatile Memory Devices --------- 2
1.1.2Nanocrystal Nonvolatile Memory ------ 4
1.2Motivation ---------------------- 6
1.3Organization of This Thesis -------- 8
Chapter 2 Basic Principle of Nonvolatile Memory
2.1Introduction -------------- 14
2.2Basic Program/Erase Mechanisms --- 16
2.2.1Tunneling Injection ---------------- 16
2.2.2Hot-Election Injection --------------- 18
2.2.3Band to Band Assisted Hole Injection -- 19
2.3Basic Reliability of Nonvolatile Memory -19
2.3.1Retention ------------------- 20
2.3.2Endurance ------------------- 20
2.4Basic Physical Characteristic of Nanocrystals NVMs ---------- 20
2.4.1Quantum Confinement Effect -------- 20
2.4.2Coulomb Blockade Effect ------------- 21
Chapter 3 Formation of W-NCs Nonvolatile Memory
3.1Motivation -------------------- 28
3.2Experimental Procedures ------------ 30
3.3Results and Discussion -------------- 31
3.4Conclusions -------------------- 35
Chapter 4 Applications of Oxygen/Nitrogen-Incorporated W-NCs NVMs
4.1Motivation ------------------ 43
4.2Experimental Procedures ------------ 43
4.3Results and Discussion -------------- 45
4.4Conclusions ------------------- 49
Chapter 5 Comparison of W-NCs Embedded in Dielectric Layers
5.1ESCA Analyses of W-NCs Embedded in Dielectric Layers ---------- 63
5.2Effect of Capped Oxide for W-NCs Formation in Dielectric Layers ----------------- 67
5.2.1Capacitance-Voltage Characteristics---- 67
5.2.2Secondary Ion Mass Spectroscopy (SIMS) Analyses for Oxidized W-Si (O/N) Layers w/o Capped 20-nm-thick Oxide --------------------- 69
5.3Discussions of Non-ideal C-V Hysteresis of W-NCs Nonvolatile Memory ----------- 72
5.4Conclusions ------------------- 73
Chapter 6 W-doped SiO2/Si3N4 as Self-assembling Layers of W-NCs
6.1Motivation ----------------- 93
6.2Experimental Procedures ------------ 93
6.3Results and Discussion -------------- 94
6.4Conclusions ------------------- 97
Chapter 7 W-incorporated Si/Si1-xGex (x=0.5) as Self-assembling Layers of W-NCs
7.1Motivation --------------- 108
7.2Experimental Procedures ------------ 108
7.3Results and Discussion -------------- 110
7.4Conclusions ------------------ 115
Chapter 8 Conclusions
8.1Conclusions ------------------ 129
Chapter 9 Future Work ------------------ 132
References ------------------------ 134
Vitae ----------------------- 142

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Chapter 7
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