本論文採用TSMC 0.18um 1P6M CMOS 製程與UMC 90nm 1P9M CMOS製程，設計一個具有低功率、快速鎖定、寬頻帶範圍延遲鎖定迴路時脈產生器。此架構包含相位頻率偵測器、電荷幫浦、頻帶選擇器、數位與類比控制延遲線與起始電路。本論文主要特色是利用頻帶選擇器來延展頻率範圍，藉由頻帶選擇器來控制類比與數位控制延遲線。本論文所提出的延遲鎖定迴路時脈產生器可提供寬頻帶範圍的鎖定與低抖動的特色。所提供的頻率範圍在TSMC 0.18um製程下為250MHz至900MHz，在UMC 90nm製程下為33MHz至300MHz。

This thesis presents a delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-controlled delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-controlled delay line. By using multi-band technology the proposed DLL can provide wider range and lower jitter compared to those of other methods. Frequency can be ranged from 250MHz to 900MHz is using TSMC 0.18um process with 1.8V supply voltage. The other implement is using UMC 90nm 1P9M CMOS process with 1V supply voltage. The frequency can be ranged from 33MHz to 300MHz.

CHAPTER 1 1
Introduction 1
-1.1Motivation 1
-1.2 Research Objectives 2
-1.3 The Organization of This Thesis 3
CHAPTER 2 4
The Concepts of Delay-locked Loop 4
-2.1 DLL Overview 4
-2.2 Operation Principle and DLL components 4
-2.3 Phase Detector / Phase Frequency Detector 5
--2.3.1 Recent research of PD and PFD 7
-2.4 Charge Pump and Loop Filter 9
--2.4.1 Programmable Bias Schemes 11
-2.5 Voltage-controlled Delay Line 11
--2.5.1 The Current-Starved Delay Cell 13
--2.5.2 Differential delay elements with symmetric loads 14
-2.6 Stability Analysis of the DLL 17
CHAPTER 3 19
A Low Power Multi-band Selector DLL with Wide-Range Locking 19
-3.1 Introduction 19
-3.2 Locking Problem of Conventional DLL 21
--3.2.1 Harmonic Locking and Stuck Looking 22
--3.3 Propose Structure and its Operation Principle 24
3.4 Circuit Design 27
-3.4.1 Phase Frequency Detector 27
-3.4.2 Charge Pump and Loop Filter 30
-3.4.3 Start-up Circuit 35
-3.4.4 Band Selector 36
-3.4.5 Multi-controlled delay line (MCDU) 38
-3.4.6 Simulation Result 43
CHAPTER 4 51
Experimental Results 51
-4.1 Test Environment 51
-4.2 Experimental Results 52
CHAPTER 5 59
-Conclusions and Future Works 59
Reference 61

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