此篇論文中所介紹的電路為一種針對連續時間類比Gm – C濾波器之自動校準電路系統。此電路系統包括一個積分器、一頻率校準電路、與一品質因數校準電路。此外，亦設計一個四階Chebyshev低通濾波器以供此校準電路系統驗證之用。所有電路設計參數均以TSMC 1P5M 0.25微米之混合信號製程參數為基礎。全電路系統之操作電壓為 ±2.5V，濾波器之截止頻率為10MHz。主要之低通濾波器經校準電路調整以後，其性能於傳輸頻帶之漣波量低於4dB，且截止頻帶衰減量超過70dB。整體校準電路之穩定時間低於3微秒。

A novel on chip automatic tuning circuit for Gm – C continuous time filter is presented. The circuit is composed of an integrator, a frequency tuning circuit, and a Q tuning circuit. A 4th order Chebyshev low pass filter is also designed with the tuning circuitry. All circuits are designed by using the parameters of TSMC 0.25um process. The power supplies are ±2.5V, and the cutoff frequency is 10MHz. The main LPF exhibits passband ripple below 4dB, and stopband attenuation over 70dB. The equilibrium time for tuning circuits is less than 3μseconds.

Content

Abstract

Section 1 Introduction

Section 2 Low Pass Filter Design
2-1 Operational Transconductance Amplifier
2-2 Design of a 4th Order Chebyshev Low Pass Filter
2-3 Current Tuning Methods
2-3-1 Frequency Tuning
2-3-2 Quality Factor Tuning

Section 3 Proposed Tuning Method
3-1 Frequency Tuning
3-2 Quality Factor Tuning
3-2-1 The Phase Shift Effect on the Q - factor in a Biquad System
3-2-2 Phase Compensation for the Integrator
3-2-3 Biquad in the New Q - Tuning System
3-2-4 The Proposed Q –Tuning System
3-2-5 The Proposed F & Q Tuning Circuit

Section 4 Simulation Results & Discussions
4-1 Simulation Results & Discussions
4-2 Performances of Main LPF After Tuning

Section 5 Conclusions

References

[1]."Design of Analog Filters”
Rolf Schaumann, Mac E.Van Valkenburg
Oxford University Press 2001

[2].“Continuous-Time Active Filter Design”
T. Deliyannis, Yichung Sun, J.K.Fidler
CRC Press 1999

[3].“Design of Analog Integrated Circuits and Systems”
Kenneth R.Laker, Willy M.C.Sansen
McGraw-Hill 1994

[4].“Low-Voltage / Low-Power Integrated Circuits and Systems”
Edger Sanchez-Sinecio, Andreas G.Andreou
IEEE Press 1999

[5].“Design of Continuous-Time Fully Integrated Filters: A Review”
Rolf Schaumann
IEE Proceedings, Vol.136, No.4, August 1989

[6].“Integrated Continuous-Time Filter Design – An Overview”
Yannis P. Tsividis
IEEE JNL of Solid-State Circuits, Vol.29, NO.3, March 1994

[7].“A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning”
Francois Krummenacher, Norbert Joehl
IEEE JNL of Solid-State Circuits, Vol.23, NO.3, June 1988

[8].“Design Considerations for High-Frequency Continuous-Time Filters and Implementation of an Antialiasing Filter for Digital Video”
Yannis P. Tsividis, Richard K. Hester, Khen-Sang Tan
IEEE JNL of Solid-State Circuits, Vol.25, NO.6, December 1990

[9].“A 10.7-MHz 68-dB SNR CMOS Continuous-Time Filter with On-Chip Automatic Tuning”
Jose Silva-Martinez, Willy Sansen, Michel S. J. Steyaert
IEEE JNL of Solid-State Circuits, Vol.27, NO.12, December 1992

[10].“A Highly Linear CMOS Gm-C Bandpass Filter with On-Chip Frequency Tuning”
Zhong Yuan Chang, D. Haseslagh, J. Verfaillie
IEEE JNL of Solid-State Circuits, Vol.32, NO.3, March 1997

[11].“A ±1.5-V, 4-MHz CMOS Continuous-Time Filter with a Single-Integrator Based Tuning”
Changsik Yoo, Seung-Wook Lee, Wonchan Kim
IEEE JNL of Solid-State Circuits, Vol.33, NO.1, January 1998

[12].“An Accurate Quality Factor Tuning Scheme for IF and High-Q Continuous-Time Filters”
Edgar Sanchez-Sinencio, Jan-Michael Stevenson
IEEE JNL of Solid-State Circuits, Vol.33, NO.12, December 1998

[13].“A Novel Q Tuning Method, Using Variable Output Conductance of Tranconductors”
P.H. Shanjani, S.M. Atarodi
ICS98 December 1998

[14].“High-frequency Two-input CMOS OTA for Continuous-Time Filter Applications”
Y.Sun, J.Glinianowicz, J.Jakusz, S.Szczepanski
IEE Proc-Circuits Devices System, Vol.147, No.1, February 2000

[15].“Mixed-mode Automatic Tuning Scheme for High-Q Continuous-Time Filters”
Rolf Schaumann, A.I.Karsilayan
IEE Proc-Circuits Devices System, Vol.147, No.1, February 2000

[16].“Phase – Locked Loops Design, Simulation, & Applications Third Edition”
Roland E. Best
McGraw–Hill 1998