在本論文中，我們提出一個改良自鍺濃縮法來製作SGOI (SiGe-On-Insulator) wafer的技術。與傳統的鍺濃縮法技術相比，它具有下列三項優點：
(1) 較低的製程溫度。
(2) 不需利用化學機械研磨技術(CMP)就能得到高平坦度的矽鍺薄膜。
(3) 利用乾氧化製程來得到品質更佳的閘級介電層。
由於 SOI Wafer 的價格昂貴, 所以在本論文的實驗中, 先以傳統 Silicon Wafer 來暫代SOI Wafer，在獲得最終的成果之後，再將其應用在 SOI Wafer 上以減少不必要的浪費。
首先我們利用在Wafer上磊晶成長一層約700Å的 Si0.85Ge0.15 薄膜，接者以乾氧化製程在矽鍺薄膜的表面成長 SiO2 將鍺原子從矽鍺薄膜表面推擠到下方以提高薄膜中的鍺含量。而根據量測結果顯示最高可以將鍺濃度從 15% 提升到 35%。而在製作過程中，我們也配合 AFM / SEM / Raman spectroscopy 等材料分析儀器對薄膜的成分比例與粗糙度進行分析量測以建立完整的成長參數。
接著以此基版進行兩種不同結構Si / SiGe heterojunctio MOS電容的製作以驗證 Si cap layer 對於 SGOI基板的必要性。而從實驗結果來看，具有Si cap layer 的元件的確比不具有Si cap layer 的元件在電性上有著 10% ~ 20% 的改善。根據實驗的成果證明，我們能結合SOI wafer與Strain-Silicon的優點成功製造出高品質的SGOI (SiGe-On-Insulator)Wafer。

In our thesis, we develop a modified fabrication method based on Ge condensation mechanism to fabricate SGOI (SiGe-on-insulator) Wafer. The advantages of this technique are as follows;
(1) Low fabrication temperature.
(2) Smooth SiGe/SiO2 interface without using CMP and good crystal quality.
(3) Better gate dielectric layer quality by dry oxidation.
In our experiment, we use silicon wafer rather than the SOI wafer to avoid cost because of the high price of the SOI wafer. First, a 700Å Si0.85Ge0.15 layer was grown on a thin SOI layer. The Ge atoms were rejected from the oxidized layer and pushed into the remaining SiGe layer by using dry oxidation at 925℃. Since it has been confirmed that the total amount of the Ge atom in the SGOI layer is conserved, the Ge fraction can be varied from 15% to 35%. During the fabrication procedure, we use semiconductor measurement instruments like AFM /SEM /Raman spectroscopy to verify the SiGe layer quality and built complete parameters database.
Then we make two different structure Si/SiGe heterojunction MOS capacitors on this wafer to verify the necessity of the Si cap layer to SGOI substrate. According to the experiment results, we can find the device with Si cap layer has better performences than the one without Si cap about 10% ~ 20% in electric characteristics.
Based on the experiment results, it is proved that a high quality SGOI wafer on the SOI wafer can be fabricated.

Content

Chapter 1 Introduction.....01

Chapter 2 Mechanism and conventional SGOI
substrate fabrications......03
2.1 Mechanism of carrier mobility improvement.....03
2.1.1Variation of the carrier effective mass......03
2.1.2 Differences of the carrier characteristics.....08
2.1.3 Existence of the Si cap layer.....08
2.2 The drawbacks of these tradictional fabrication methods......09
2.3 SGOI Substrate Fabricated by SIMOX Technology.....10
2.4 SGOI Substrate Fabricated by Wafer Bonding.....12
2.5 SGOI Substrate Fabricated by Smart-cut.....13
2.6 Summary.....13

Chapter 3 Experiment results of modified Ge condensation
method.....15
3.1 Ultra-High Vacuum Chemical Vapor Deposition
(UHV-CVD) For SiGe film epitaxy.....15
3.2 Raman scattering spectroscopy.....16
3.3 Ge condensation technique concept.....17
3.4 SGOI substrate fabrication process.....20
3.5 Experiment results
3.5.1 Oxidation rate on SiGe layer and Si layer.....21
3.5.2 Surface roughness changes with oxidation time.....24
3.5.3 Ge fraction changes with oxidation time.....37
3.6 Summary.....40

Chapter 4 Si / SiGe heterojunction MOS capacitor.....41
4.1 Fabrication procedure.....41
4.2 C-V Measurement.....43
4.3 C-V characteristics.....44
4.4 Summary.....46

Chapter 5 Conclusion.....47

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