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博碩士論文 etd-0720101-164245 詳細資訊
Title page for etd-0720101-164245
論文名稱
Title
凹入式多邊閘極SOI金氧半的製作與特性研究
Characterization and Fabrication of Recessed Multi-Gate SOI MOSFET
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
51
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2001-06-28
繳交日期
Date of Submission
2001-07-20
關鍵字
Keywords
SOI金氧半、多邊閘極、凹入式
SOI MOSFET, Multi-Gate, Recessed
統計
Statistics
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中文摘要
摘要
在本論文中,我們提出一個具有高轉導及低串接電阻的三邊凹入式多重閘極SOI元件. 此一SOI元件的結構有三個特點:
(1) 以平臺式隔離代替傳統LOCOS隔離及溝渠式隔離,可避免鳥嘴效應的發生,同時也免除了以往矽晶膜中挖溝渠的複雜度與困難度,大大地簡化了隔離製程。
(2) 結合圓角化(rounded)以及凹入式結構來減少邊緣效應(edge effect)和降低源極與汲極的串接電阻。
(3) 三面閘極的結構可以在不降低電路集積密度,增加有效通道寬度提高元件的電流驅動力。
從我們實驗結果可得知元件的特性趨勢與3D模擬結果是一致的。

根據3D DAVINCI 模擬以及實驗結果,三邊凹入式多重閘極有四個特點,而這四個特點證明了三邊凹入式多重閘極在深次微米領域中優於相同元件參數的傳統SOI元件。
(1) 多重閘極元件比傳統SOI元件有較佳的短通道效應與DIBL效應(drain induce barrier lowing)的免疫力。
(2) 它有較高的轉導及電流驅動力。
(3) 它的崩潰電壓比傳統SOI元件高。
(4) 自熱效應(self-heating effect)不會隨著電流增益增加而增加,因此三邊凹入式多重閘極對自熱效應有較佳的免疫力。
這四點優點顯示隨著元件尺寸不斷縮小,三邊凹入式多重閘極適合於高速度低功率消耗的應用。

Abstract
Abstract
In this thesis, we propose and fabricate a triple recessed multi-gate SOI device that has high transconductance and low series resistance. The SOI device structure has three unique features. First, it uses mesa isolation instead of using conventional LOCOS and trench isolation to avoid the bird’s beak effect in LOCOS isolation and the complexity of digging trench in trench isolation. Second, it combines the rounded and gate recessed structure to reduce the edge effect and lower the source/drain parasitic resistance. Third, it has three surfaces of gate structure that can increase the effective channel width of the device to enhance the current drivability of the device without reducing the packing density of the integrated circuit. From our experiment results the trends of device characteristics exhibits good agreement with the 3 – D simulation results.

According to the simulation results of 3 – D DAVINCI and the measurement results, triple recessed multi-gate SOI MOSFET’s presents four unique characteristics, which are superior to conventional SOI with the same device parameter in deep sub-micrometer regime. First, multi-gate SOI has better short channel effect and drain induce barrier lowing immunity conventional SOI device than conventional SOI device. Second, it has higher transconductance and higher current drive capability. Third, the breakdown voltage is higher than that of conventional SOI device. Fourth, self-heating effect would not increase with current gain increase, triple recessed multi-gate SOI device has better self-heating effect immunity. These four advantages show the triple recessed multi-gate SOI MOSFET’s is suitable for high speed and low power applications along shrink of device dimensions.
目次 Table of Contents
Table of Contents
Chapter 1 Introduction………………………………………...1

Chapter 2 The fully depleted and multi-gate architecture….…3
2.1 Fully depleted SOI……………………………………………..3
2.2 Multi-gate architecture…………………………………………7
2.2.1 TIS architecture………………………………...……..7
2.2.2 SGT architecture………………………………………9
2.2.3 GAA architecture……………………………………..11
2.3 Summary………………………………………………………14

Chapter 3 Simulation results and discussion………………....15
3.1 The triple recessed multi-gate NMOSFET’s device and test device structures……………………………..………………15
3.2 The ID - VG characteristics……………………………………..20
3.2.1 The short channel effect………………………………20
3.2.2 The subthreshold factor……………………………….21
3.2.3 The drain induced barrier lowing effect………………22
3.3 The ID - VDS characteristics…………………………………..24
3.3.1 The normalization saturation current…………………24
3.3.2 The excess current gain……………………………….26
3.3.3 The self-heating effect……………………………...…28
3.3.4 The breakdown voltage……………………………….30
3.4 Summary……………………………………………….…….31

Chapter 4 Experiment results of triple recessed multi-gate NMOSFET’s………………….. ……………….32
4.1 Triple recessed multi-gate NMOSFET’s device structure..…32
4.2 The device fabrication process steps………………………..34
4.3 The experiment results………………………………………38
4.3.1 ID - VG characteristics……………………………....38
4.3.2 ID - VDS characteristics……………………………...42
4.4 Discussion………………………………………………….44
4.5 Summary…………………………………………………...46

Chapter 5 Conclusions………………………….……………47
Reference……………………………………………………48
參考文獻 References
Reference

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