在高速數位電路中，為了能更有效利用有限的積板體積，印刷電路勢必往多層化發展，而過孔結構(via)正是將各個訊號層做垂直方向穿層連結，然而此不連續結構，隨著電路操作頻率的提高與工作電壓的下降，對訊號品質的不良影響漸漸不能輕忽，使用傳統時域有限差分法分析此問題，受限於Yee網格在模擬結構不為矩形時，網格與模擬結構不一致進而產生誤差，為了能有效改善此缺點，本論文在傳統時域有限差分法的基礎上，在磁場計算式上引入保形修正項，藉此在不將網格切細的前提下得到正確的模擬結果，在論文的後半部，我們討論了關於訊號在via傳輸時易耦合至鄰近訊號線的問題並提出使用地過孔結構(ground via )改善此問題，除此之外本論文更進一步討論當基板大小約數公分時，訊號經基板電源層時產生的共振現象與IC在基板上工作時，訊號零與一快速切換時產生的瞬時切換雜訊的問題。

In high –speed digital circuits, in order to utilize the space of printed circuit boards(PCB) efficiently, the signal via is a heavily used interconnection structure to communicate different signal layers. However, the interconnection discontinuities will result in the degradation of the signal integrity and become a crucial issue for IC designers. To analyze this problem using finite difference time domain(FDTD) method, the stair case approach of interesting structure with curved metallic surface not only introduce errors due to inaccurate approximation, but consume much simulation time and memory required .
In this thesis, a conformal FDTD method of locally distorted contours is presented. By modification of Maxwell’s equations in integration form, we simulate the signal via successfully and discuss several interesting issues such as resonance in power/ground plane, the simultaneous switching noise(SSN), the effect of adding ground vias in PCB, and common-mode and differential-mode drives for source, etc.

第一章 序
1.1 研究目的與方法...........................................................................................1
1.2 論文大綱.......................................................................................................2
第二章 時域有限差分法
2.1 介紹...............................................................................................................4
2.2 FDTD公式推導............................................................................................4
2.3 Courant 穩定準則........................................................................................7
2.4 阻抗性電壓源與電阻模擬...........................................................................8
第三章 時域有限差分法結合保形修正
3.1 介紹............................................................................................................10
3.2 2D Conformal FDTD 公式推導............................................................10
3.3 3D Conformal FDTD推導......................................................................14
3.4 使用CF FDTD模擬三維完美導體結構..................................................15
第四章 印刷電路板中過孔結構
4.1 介紹............................................................................................................17
4.2 過孔結構模擬............................................................................................18
4.3 過孔結構分析...........................................................................................25
4.4 共模、差模輸入與動力面效應分析.......................................................30
第五章 瞬時切換雜訊
5.1 介紹............................................................................................................38
5.2 印刷電路板的共振....................................................................................39
5.3 瞬時切換雜訊經過孔結構的耦合效應....................................................41
5.4 使用地過孔結構降低瞬時切換雜訊對訊號過孔的耦合........................47
第六章 結論............................................................................................................49

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