以二維材料硒化銦作為電流通道的場效電晶體具有很高的載子遷移率、開關電流比等良好電特性，然而在量測其場效特性時伴隨著程度不等的遲滯現象，導致硒化銦場效電晶體的諸多本質特性不穩定，例如臨限電壓值、載子遷移率等。因此研究是什麼因素導致遲滯現象的發生及陷阱充放電程度對遲滯大小造成的影響並設法去除遲滯現象是目前迫切需解決的問題。實驗結果顯示量測場效特性時的閘極掃描速度會影響遲滯的大小，以0.29 V/s的掃描速度量測到的遲滯大小約為30 V，單位面積陷阱捕獲的電荷數約為2×1012 cm-2；增加閘極掃描速度至0.75 V/s時的遲滯大小減小到7 V，被捕獲的電荷密度也減少至約7×1011 cm-2，經計算後陷阱捕獲電荷的時間常數為6.4 s，而量測時最大停留時間僅有3.5 s，因此閘極掃描速度越慢將使的陷阱捕獲越多電荷導致遲滯現象越明顯。不同的掃描範圍也會改變遲滯的大小，以±80 V的掃描範圍量測到的遲滯大小約27.7 V，被陷阱捕獲的電荷密度約為2.3×1012 cm-2；減小閘極掃描範圍至±10 V時的遲滯大小減小為0.6 V，而陷阱捕獲的電荷密度也減少至4.9×1010 cm-2，經量測後證實施加越大的閘極電壓將使陷阱捕獲越多的的電荷，因此越大的閘極掃描範圍遲滯現象越明顯。之後我們於不同環境下進行量測，結果顯示於真空環境及純氮氣環境中遲滯大小並無明顯差異，皆為7 V，之後置於大氣環境下遲滯大小增加至38 V遠大於前兩者，且此現象是可逆反應，置於真空環境兩天的時間後遲滯大小恢復為原來的7 V，因此推論導致遲滯現象的主要因素為表面吸附的水氣所致，而真空環境下少許的遲滯現象為二氧化矽表面缺陷所致，經計算此缺陷深度約為0.83 eV。我們針對導致遲滯現象的因素去進行改良，以無懸浮鍵的氮化硼隔絕二氧化矽表面的缺陷並於高真空環境下減少吸附的水氣後我們成功製出近乎無遲滯現象的場效電晶體。

Field effect transistors (FETs) made by few-layered indium selenide (InSe) exhibit good electrical characteristics. However, hysteresis is often observed in InSe-FETs which can affect intrinsic electrical properties. Therefore, investigating the possible factors which influence the hysteresis of InSe-FETs and further reducing the hysteresis are the primary targets in this work. The sweep rate of gate-voltage was observed to affect the hysteresis. The magnitude of hysteresis was 30 V via the sweep rate of 0.29 V/s and the number of charges captured by traps per unit area was about 2×1012 cm-2. When the sweep rate increased to 0.75 V/s, the hysteresis reduced to 7 V, and the trapped charge density also reduced to approximately 7×1011 cm-2. The trapped time constant was about 6.4 s which is longer than the maximum stay time of the gate voltage. Therefore, the slower gate sweep rate may cause a more significant hysteresis. The magnitude of hysteresis was 30 V via the sweep range of ±80 V and the number of charges captured by traps per unit area was about 2.3×1012 cm-2. When the sweep range decreased to ±10 V, the hysteresis reduced to 0.6 V, and the trapped charge density also reduced to 4.9×1010 cm-2. The larger gate voltage may cause the traps to capture more charge, so the larger gate sweep range may cause more significant hysteresis. Both the hysteresis in the vacuum environment and nitrogen environment were 7 V, but the hysteresis increased to 38 V in the atmosphere. The phenomenon is reversible because the hysteresis may return to 7 V after two days in the vacuum environment. Therefore, we speculate that the adsorption of water is the main factor which leads to hysteresis. The slight hysteresis in the vacuum environment is caused by the surface defects of silicon dioxide (SiO2), and the defect depth is about 0.83 eV. We improved InSe-FETs by isolating the defects of silicon dioxide with dangling bond-free hexagonal boron nitride (h-BN) and reducing the adsorbed water in the high vacuum environment. Finally, we successfully fabricated hysteresis-free InSe-FETs.

論文審定書i
誌謝 ii
摘要 iii
Abstract iv
目錄 vi
圖目錄viii
表目錄xi
第一章 序論1
第一節 前言1
第二節 研究動機3
第二章 理論基礎5
第一節 場效電晶體及其運作原理5
第二節 二維硒化銦場效電晶體8
第三節 遲滯現象12
第四節 名詞解釋及參數定義17
第三章 儀器介紹及元件製程21
第一節 製程儀器22
第二節 量測儀器24
第三節 元件製程26
第四章 實驗結果與討論29
第一節 硒化銦場效電晶體之基本性質29
第二節 導致遲滯現象的因素34
第三節 閘極掃描速度對遲滯大小的影響 37
第四節 閘極掃描範圍對遲滯大小的影響 43
第五節 遲滯現象的物理機制及改善方法 49
第五章 結論59
第六章 參考文獻60

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