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博碩士論文 etd-0723103-122933 詳細資訊
Title page for etd-0723103-122933
論文名稱
Title
利用IBIS模型鏈結有限時域差分法模擬及分析訊號品質和電磁輻射
Using IBIS Model for Signal Integrity and EMI Analysis in FDTD Method Simulation
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
89
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2003-07-02
繳交日期
Date of Submission
2003-07-23
關鍵字
Keywords
輸入/出閘行為資料規格
IBIS
統計
Statistics
本論文已被瀏覽 5700 次,被下載 4263
The thesis/dissertation has been browsed 5700 times, has been downloaded 4263 times.
中文摘要
近年來由於時脈的工作的頻率增加到了GHz,越來越多的電磁相容問題因應而生,使用時域有限差分法來分析訊號品質以及電磁輻射在印刷電路板的問題時,如何將主動元件的效應也考慮進去變成一個關鍵的問題。
IBIS模型則是最適合此一用途的資源,在此篇論文中我們將介紹一種新的方法,利用IBIS模型鏈結時域有限差分法用在印刷電路板模擬及分析電磁相容的問題,同時也將其模擬與量測比較有極為正確的結果。
Abstract
Recently clock rates in digital system reach in GHz range, and therefore EMC problems were occurred. Based on the FDTD modeling approach, signal integrity (SI) and electromagnetic radiation (EMI) for high-speed digital circuits to get accurate results ,including the active IC into FDTD method is the key issue on the printed circuit boards (PCB) are investigated.
IBIS (I/O buffer information specification) model is one of the good choices to show the behavior of digital devices. In this paper we propose the way of linking IBIS model of the active IC into FDTD to study about EMC problem in high-speed PCB. Several examples are demonstrated for checking the accuracy of the approach. By combining with experimental results, the combining method show good accuracy both in SI and EMI.
目次 Table of Contents
中文摘要 i
誌謝 iii
目錄 iv
圖列 vii
第一章 高速數位主動元件介面簡介 1
1.1 高速超大型積體電路(VLSI)介面簡介 1
1.2 高速超大型積體電路(VLSI)介面模擬 1
第二章 FDTD演算法 4
2.1 從馬克思威爾方程式到FDTD演算法 4
2.1.1 三維方程式 4
2.1.2 中央差分與Yee演算法 4
2.2 數值穩定 8
2.3 介質處理 8
2.4 波源條件 8
2.5 吸收邊界條件 9
2.5.1 完美匹配層吸收邊界 9
2.5.2 非分離場完美匹配層吸收邊界 10
2.6 近場與遠場轉換 13
2.7 集總元件 14
2.7.1 FDTD演算法延伸至電路元件 14
2.7.2 電阻 15
2.7.3 阻抗性電壓源 15
2.7.4 電容 16
2.8 電腦演算法與FDTD方法 16
2.8.1 前置過程 16
2.8.2 進行時間步階 16
2.8.3 紀錄場值 17
第三章 speed2000的工作原理及實驗結果比較 18
3.1 speed2000的工作原理 18
3.2 電力平面層模擬結構比較 20
3.2.1 開槽結構的實驗比對-裸板 20
3.2.2 開槽結構的實驗比對-開槽 22
3.3 連通柱結構的比對 26
3.4 結論 30
第四章 IBIS模型的原理及萃取方式 31
4.1 I/O buffer的工作原理 31
4.2 IBIS萃取方法 31
4.3 模擬及結果 34
4.4 兩層板模擬與量測之比對與探討 36
4.5 時域的誤差探討 43
第五章 IBIS模型在四層板中被動結構的探討 48
5.1 IBIS在四層板中結構的模型 48
5.2 在四層板中各式結構的量測與模擬比對 49
5.2.1 完整接地面結構 49
5.2.2 接地面狹縫結構 51
5.2.3 穿越電力平面結構(連通柱) 53
5.2.4 蛇型線結構 55
5.3 各結構的比較及總結 58
第六章 IBIS模型在差動對結構中的比對 59

6.1 差動對的簡介 59
6.2 IBIS模型的模擬與分析 61
6.2.1 IBIS模型在差動對結構的模擬與分析-完整接地平面 61
6.2.2 IBIS模型在差動對結構的模擬與分析-狹縫 64
6.2.3 IBIS模型在差動對結構的模擬與分析-連通柱 66
6.3 結論 67
第七章 IBIS模型鏈結時域有限差分法的方便化以及實用化 68
7.1 等效性電流源法的原理 68
7.2 穿越電力平面連通柱的驗證 69
7.3 加入複雜的電路 71
7.4 IBIS模型未來的發展以及改進方向 74
7.5 結論 75
第八章 總結與未來方向 76
8.1 總結 76
8.2 未來方向 76
參考文獻 77
參考文獻 References
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